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SAMOS 2015: Samos, Greece
- Dimitrios Soudris, Luigi Carro:
2015 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2015, Samos, Greece, July 19-23, 2015. IEEE 2015, ISBN 978-1-4673-7311-1
Keynotes
- Onur Mutlu:
Rethinking memory system design for data-intensive computing. i - Marco Jacobs:
Visual processing sparks a new class of processors. ii - Keshav Pingali:
Parallel program = operator + schedule + parallel data structure. iii
Session 1A: Multimedia and Graphics Architectures and Processors
- Luna Backes, Alejandro Rico, Björn Franke:
Experiences in speeding up computer vision applications on mobile computing platforms. 1-8 - Miguel Angel Aguilar, Juan Fernando Eusse, Projjol Ray, Rainer Leupers, Gerd Ascheid, Weihua Sheng, Prashant Sharma:
Parallelism extraction in embedded software for android devices. 9-17 - Christoph Gerum, Wolfgang Rosenstiel, Oliver Bringmann:
Improving accuracy of source level timing simulation for GPUs using a probabilistic resource model. 18-25
Session 1B: Reconfigurable Computing
- Dionysios Diamantopoulos, Christoforos Kachris:
High-level synthesizable dataflow MapReduce accelerator for FPGA-coupled data centers. 26-33 - Miguel Bordallo López, Alejandro Nieto, Olli Silvén, Jani Boutellier, David López Vilariño:
Reconfigurable computing for future vision-capable devices. 34-41 - Milovan Duric, Milan Stanic, Ivan Ratkovic, Oscar Palomar, Osman S. Unsal, Adrián Cristal, Mateo Valero, Aaron Smith:
Imposing coarse-grained reconfiguration to general purpose processors. 42-51
Session 3A: System-Level Design, Simulation, and Verification
- Xinnian Zheng, Pradeep Ravikumar, Lizy K. John, Andreas Gerstlauer:
Learning-based analytical cross-platform performance prediction. 52-59 - Stavros Tripakis:
Bridging the semantic gap between heterogeneous modeling formalisms and FMI. 60-69 - Efstathios Sotiriou-Xanthopoulos, Shalina Percy Delicia, Peter Figuli, Kostas Siozios, George Economakos, Jürgen Becker:
A power estimation technique for cycle-accurate higher-abstraction SystemC-based CPU models. 70-77
Session 3B: Design Space Exploration Strategies
- Thomas Papastergiou, Lazaros Papadopoulos, Dimitrios Soudris:
Platform-aware dynamic data type refinement methodology for radix tree Data Structures. 78-85 - Daniel Pfefferkorn, Achim Schmider, Guillermo Payá Vayá, Martin Neuenhahn, Holger Blume:
FNOCEE: A framework for NoC evaluation by FPGA-based emulation. 86-95 - Marc Reichenbach, Benjamin Pfundt, Dietmar Fey:
Framework for parameter analysis of FPGA-based image processing architectures. 96-102
Session 3C: System-Level Design, Simulation, and Verification
- Tom Spink, Harry Wagstaff, Björn Franke, Nigel P. Topham:
Efficient dual-ISA support in a retargetable, asynchronous Dynamic Binary Translator. 103-112 - Yang Yang, Stavros Tripakis, Alberto L. Sangiovanni-Vincentelli:
Efficient distribution of Triggered Synchronous Block Diagrams on asynchronous platforms. 113-122 - Diego F. de Souza, Aleksandar Ilic, Nuno Roma, Leonel Sousa:
HEVC in-loop filters GPU parallelization in embedded systems. 123-130
Session 3D: Design Space Exploration Strategies
- Steven D. Feldman, Pierre LaBorde, Damian Dechev:
Tervel: A unification of descriptor-based techniques for non-blocking programming. 131-140 - Nasim Farahini, Ahmed Hemani, Hasan Sohofi, Shuo Li:
Physical design aware system level synthesis of hardware. 141-148 - Omar Naji, Christian Weis, Matthias Jung, Norbert Wehn, Andreas Hansson:
A high-level DRAM timing, power and area exploration tool. 149-156
Session 3E: MP-SoC
- Wei Quan, Andy D. Pimentel:
Towards self-adaptive MPSoC systems with adaptivity throttling. 157-164 - Leandro Soares Indrusiak, Piotr Dziurzanski:
An interval algebra for multiprocessor resource allocation. 165-172 - Davide Gadioli, Gianluca Palermo, Cristina Silvano:
Application autotuning to support runtime adaptivity in multicore architectures. 173-180
Session 3F: Fault-Tolerant
- Mehrtash Manoochehri, Michel Dubois:
Chip-independent Error Correction in main memories. 181-188 - Peter Waszecki, Martin Lukasiewycz, Samarjit Chakraborty:
Decentralized diagnosis of permanent faults in automotive E/E architectures. 189-196 - Shyamsundar Venkataraman, Rui Santos, Akash Kumar, Jasper Kuijsten:
Hardware task migration module for improved fault tolerance and predictability. 197-202 - Zhi Chen, Ryoichi Inagaki, Alexandru Nicolau, Alexander V. Veidenbaum:
Software fault tolerance for FPUs via vectorization. 203-210 - Pei Liu, Ahmed Hemani, Kolin Paul:
3D-stacked many-core architecture for biological sequence analysis problems. 211-220 - Ernst Joachim Houtgast, Vlad Mihai Sima, Koen Bertels, Zaid Al-Ars:
An FPGA-based systolic array to accelerate the BWA-MEM genomic mapping algorithm. 221-227 - Nabil Hallou, Erven Rohou, Philippe Clauss, Alain Ketterlin:
Dynamic re-vectorization of binary code. 228-237 - Yosi Ben-Asher, Irina Lipov, Vladislav Tartakovsky, Dror Tiv:
Generating ASIPs with reduced number of connections to the register-file. 238-245
Special Session: Bridging FP7 Framework and Horizon 2020: Current and future priorities of Europe
- Dimitrios Soudris, Sotirios Xydis, Christos Baloukas, Anastasia Hadzidimitriou, Ioanna Chouvarda, Kostas Stamatopoulos, Nicos Maglaveras, John Chang, Andreas Raptopoulos, David Manset, Barbara K. Pierscionek, Reem Kayyali, Nada Y. Philip, Tobias Becker, Katerina Vaporidi, Eumorphia Kondili, Dimitrios Georgopoulos, Lesley Ann Sutton, Richard Rosenquist, Lydia Scarfo, Paolo Ghia:
AEGLE: A big bio-data analytics framework for integrated health-care services. 246-253 - Benedikt Janßen, Fynn Schwiegelshohn, Martijn Koedam, François Duhem, Leonard Masing, Stephan Werner, Christophe Huriaux, Antoine Courtay, Emilie Wheatley, Kees Goossens, Fabrice Lemonnier, Philippe Millet, Jürgen Becker, Olivier Sentieys, Michael Hübner:
Designing applications for heterogeneous many-core architectures with the FlexTiles Platform. 254-261 - Dimitris Theodoropoulos, Dionisios N. Pnevmatikatos, Carlos Álvarez, Eduard Ayguadé, Javier Bueno, Antonio Filgueras, Daniel Jiménez-González, Xavier Martorell, Nacho Navarro, Carlos Segura, Carles Fernández, David Oro, Javier Rodríguez Saeta, Paolo Gai, Antonio Rizzo, Roberto Giorgi:
The AXIOM project (Agile, eXtensible, fast I/O Module). 262-269 - Dimitrios Rodopoulos, Simone Corbetta, Giuseppe Massari, Simone Libutti, Francky Catthoor, Yiannakis Sazeides, Chrysostomos Nicopoulos, Antoni Portero, Etienne Cappe, Radim Vavrík, Vít Vondrák, Dimitrios Soudris, Federico Sassi, Agnes Fritsch, William Fornaciari:
HARPA: Solutions for dependable performance under physically induced performance variability. 270-277
Special Session: Mid-Term Results of the H-INCEPTION CATRENE project
- Cédric Ben Aoun, Liliana Andrade, Torsten Mähne, François Pêcheux, Marie-Minerve Louërat, Alain Vachoux:
Pre-simulation elaboration of heterogeneous systems: The SystemC multi-disciplinary virtual prototyping approach. 278-285 - Nikolaos Ilieskou, Marijn Blom, Lou J. Somers, Michel A. Reniers, Twan Basten:
Multi-Domain Virtual Prototyping in a SystemC SIL framework: A heating system case study. 286-294 - Kiki Wirianto, Amir Zjajo, Carlo Galuzzi, Rene van Leuken:
Multi-Domain SystemC model of 128-channel time-multiplexed neural interface front-end. 295-302
Special Session: Mid-Term Results of the ALMARVI ARTEMIS project
- Joonas Multanen, Timo Viitanen, Henry Linjamaki, Heikki Kultala, Pekka Jääskeläinen, Jarmo Takala, Lauri Koskinen, Jesse Simonsson, Heikki Berg, Kalle Raiskila, Tommi Zetterman:
Power optimizations for transport triggered SIMD processors. 303-309 - Jiri Kadlec:
Video chain demonstrator on Xilinx Kintex7 FPGA with EdkDSP floating point accelerators. 310-314 - Joost Hoozemans, Stephan Wong, Zaid Al-Ars:
Using VLIW softcore processors for image processing applications. 315-318 - Irene Pöllänen, Billy Braithwaite, Keijo Haataja, Tiia Ikonen, Pekka J. Toivanen:
Current analysis approaches and performance needs for whole slide image processing in breast cancer diagnostics. 319-325 - Duygu Buyukaydin, Toygar Akgün:
GPU implementation of an anisotropic Huber-L1 dense optical flow algorithm using OpenCL. 326-331 - Jari Hannuksela, Matti Niskanen, Markus Turtinen:
Performance evaluation of image noise reduction computing on a mobile platform. 332-337 - Amir R. B. Behrouzian, Dip Goswami, Twan Basten, Marc Geilen, Hadi Alizadeh Ara:
Multi-Constraint multi-processor Resource Allocation. 338-346
VIPES Workshop
- Diana Göhringer, Michael Hübner, Jerónimo Castrillón, Cristina Silvano:
ViPES 2015 - Preface. 347 - Luis Gabriel Murillo, Robert Lajos Bücs, Rainer Leupers, Gerd Ascheid:
Deterministic event-based control of Virtual Platforms for MPSoC software debugging. 348-353 - Stefan Schürmans, Gereon Onnebrink, Rainer Leupers, Gerd Ascheid, Xiaotao Chen:
ESL power estimation using virtual platforms with black box processor models. 354-359 - Nikolaos Zompakis, Kostas Siozios:
A framework for reducing the modeling and simulation complexity of Cyberphysical Systems. 360-365 - Jan Wagner, Rolf Meyer, Rainer Buchty, Mladen Berekovic:
A scriptable, standards-compliant reporting and logging extension for SystemC. 366-371 - Christian Sauer, Hans-Peter Löb:
A lightweight infrastructure for the dynamic creation and configuration of virtual platforms. 372-377 - Jan Henrik Weinstock, Rainer Leupers, Gerd Ascheid:
Parallel SystemC simulation for ESL design using flexible time decoupling. 378-383 - Efstathios Sotiriou-Xanthopoulos, Sotirios Xydis, Kostas Siozios, George Economakos:
A virtual platform for exploring hierarchical interconnection for many-accelerator systems. 384-389 - Philipp Wehner, Jens Rettkowski, Tobias Kleinschmidt, Diana Göhringer:
MPSoCSim: An extended OVP simulator for modeling and evaluation of Network-on-Chip based heterogeneous MPSoCs. 390-395
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