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2020 – today
- 2023
[c25]Leon Stok
:
Quantum Challenges for EDA. ISPD 2023: 196- 2021
- [j14]Sherief Reda, Leon Stok, Pierre-Emmanuel Gaillardon:
Guest Editors' Introduction: The Resurgence of Open- Source EDA Technology. IEEE Des. Test 38(2): 5-7 (2021) - [c24]Leon Stok:
EDA and Quantum Computing: The key role of Quantum Circuits. ISPD 2021: 111 - 2020
- [j13]Shesha Raghunathan, Leon Stok:
EDA and Quantum Computing: a symbiotic relationship? IEEE Des. Test 37(6): 71-78 (2020)
2010 – 2019
- 2018
- [c23]Leon Stok:
Concurrent High Performance Processor Design: From Logic to PD in Parallel. ISPD 2018: 56-57 - [p1]Leon Stok:
EDA3.0: Implications to Logic Synthesis. Advanced Logic Synthesis 2018: 1-20 - 2014
- [j12]Leon Stok:
The Next 25 Years in EDA: A Cloudy Future? IEEE Des. Test 31(2): 40-46 (2014) - 2013
- [j11]Leon Stok:
Developing Parallel EDA Tools [The Last Byte]. IEEE Des. Test 30(1): 65-66 (2013) - 2011
- [e1]Leon Stok, Nikil D. Dutt, Soha Hassoun:
Proceedings of the 48th Design Automation Conference, DAC 2011, San Diego, California, USA, June 5-10, 2011. ACM 2011, ISBN 978-1-4503-0636-2 [contents] - 2010
- [c22]Ruchir Puri, William H. Joyner, Raj Jammy, Ahmed Jerraya, Jan M. Rabaey, Walden C. Rhines, Leon Stok:
EDA challenges and options: investing for the future. DAC 2010: 1-2
2000 – 2009
- 2009
- [c21]Leon Stok:
From restrictive to prescriptive design. ASP-DAC 2009 - 2008
- [j10]Leon Stok:
Variability and New Design Paradigms. IEEE Des. Test Comput. 25(4): 344 (2008) - 2007
- [j9]Sachin S. Sapatnekar, Leon Stok:
DAC Highlights. IEEE Des. Test Comput. 24(5): 502-504 (2007) - 2005
- [c20]Ruchir Puri, Leon Stok, Subhrajit Bhattacharya:
Keeping hot chips cool. DAC 2005: 285-288 - [c19]Ruchir Puri, David S. Kung, Leon Stok:
Minimizing power with flexible voltage islands. ISCAS (1) 2005: 21-24 - 2003
- [j8]Soha Hassoun, Steven M. Nowick, Leon Stok:
Guest Editorial. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(6): 662-664 (2003) - [c18]Ruchir Puri, Leon Stok, John M. Cohn, David S. Kung, David Z. Pan, Dennis Sylvester, Ashish Srivastava, Sarvesh H. Kulkarni:
Pushing ASIC performance in a power envelope. DAC 2003: 788-793 - [c17]Leon Stok, John M. Cohn:
There is life left in ASICs. ISPD 2003: 48-50 - 2002
- [c16]Thomas Kutzschebauch, Leon Stok:
Layout Driven Decomposition with Congestion Consideration. DATE 2002: 672-676 - 2001
- [c15]Thomas Kutzschebauch, Leon Stok:
Congestion Aware Layout Driven Logic Synthesis. ICCAD 2001: 216-223 - 2000
- [j7]Frederik Beeftink, Prabhakar Kudva, David S. Kung, Ruchir Puri, Leon Stok:
Combinatorial cell design for CMOS libraries. Integr. 29(1): 67-93 (2000) - [c14]Raul Camposano, Olivier Coudert, Patrick Groeneveld, Leon Stok, Ralph H. J. M. Otten:
Timing closure: the solution and its problems. ASP-DAC 2000: 359-364 - [c13]Wilm E. Donath, Prabhakar Kudva, Leon Stok, Paul Villarrubia, Lakshmi N. Reddy, Andrew Sullivan, Kanad Chakraborty:
Transformational Placement and Synthesis. DATE 2000: 194-201 - [c12]Thomas Kutzschebauch, Leon Stok:
Regularity Driven Logic Synthesis. ICCAD 2000: 439-446
1990 – 1999
- 1999
- [c11]Leon Stok, Andrew J. Sullivan, Mahesh A. Iyer:
Wavefront Technology Mapping. DATE 1999: 531- - 1998
- [j6]Daniel Brand, Reinaldo A. Bergamaschi, Leon Stok:
Don't cares in synthesis: theoretical pitfalls and practical solutions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(4): 285-304 (1998) - [c10]Frederik Beeftink, Prabhakar Kudva, David S. Kung, Leon Stok:
Gate-size selection for standard cell libraries. ICCAD 1998: 545-550 - 1997
- [c9]Anirudh Devgan, Leon Stok, Sandip Kundu:
Timing analysis and optimization: from devices to systems (tutorial). ICCAD 1997 - 1996
- [j5]Leon Stok, David S. Kung, Daniel Brand, Anthony D. Drumm, Andrew J. Sullivan, Lakshmi N. Reddy, Nathaniel Hieter, David J. Geiger, Han Hsun Chao, Peter J. Osler:
BooleDozer: Logic synthesis for ASICs. IBM J. Res. Dev. 40(4): 407-430 (1996) - [j4]Guy Even, Ilan Y. Spillinger, Leon Stok:
Retiming revisited and reversed. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(3): 348-357 (1996) - 1995
- [j3]Reinaldo A. Bergamaschi, Richard A. O'Connor, Leon Stok, Michael Z. Moricz, Shiv Prakash, Andreas Kuehlmann, D. Sreenivasa Rao:
High-level synthesis in an industrial environment. IBM J. Res. Dev. 39(1-2): 131-148 (1995) - [c8]Leon Stok, Ilan Y. Spillinger, Guy Even:
Improving initialization through reversed retiming. ED&TC 1995: 150-154 - [c7]Daniel Brand, Reinaldo A. Bergamaschi, Leon Stok:
Be careful with don't cares. ICCAD 1995: 83-86 - [c6]Reinaldo A. Bergamaschi, Daniel Brand, Leon Stok, Michel R. C. M. Berkelaar, Shiv Prakash:
Efficient use of large don't cares in high-level and logic synthesis. ICCAD 1995: 272-278 - 1994
- [j2]Leon Stok:
Data path synthesis. Integr. 18(1): 1-71 (1994) - [c5]Leon Stok:
Is high-level synthesis marketable? (panel). HLSS 1994: 66 - 1992
- [j1]Leon Stok, Jochen A. G. Jess:
Foreground memory management in data path synthesis. Int. J. Circuit Theory Appl. 20(3): 235-255 (1992) - [c4]Leon Stok:
False loops through resource sharing. ICCAD 1992: 345-348 - 1991
- [c3]H. M. A. M. Arts, Jos T. J. van Eijndhoven, Leon Stok:
Flexible Block-Multiplier Generation. ICCAD 1991: 106-109 - 1990
- [c2]Leon Stok:
Interconnect optimisation during data path allocation. EURO-DAC 1990: 141-145
1980 – 1989
- 1989
- [c1]Leon Stok, G. P. Koster:
From Network to Artwork. DAC 1989: 686-689
Coauthor Index
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