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Shunichi Kato

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1980 – 1989

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1984
[c5]
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  - conf/itc/SasakiKNT84
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Tohru Sasaki, Shunichi Kato, Nobuyoshi Nomizu, Hidetoshi Tanaka:
Logic Design Verification Using Automated Test Generation. ITC 1984: 88-95
1983
[c4]
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Masato Kawai, Hideo Shibano, Shigehiro Funatsu, Shunichi Kato, T. Kurobe, K. Ookawa, Tohru Sasaki:
A High Level Test Pattern Generation Algorithm. ITC 1983: 346-353
1981
[c3]
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Tohru Sasaki, Akihiko Yamada, Toshinori Aoyama, Katsutoshi Hasegawa, Shunichi Kato, Shinichi Sato:
Hierarchical design verification for large digital systems. DAC 1981: 105-112
1980
[c2]
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Tohru Sasaki, Akihiko Yamada, Shunichi Kato, Terufumi Nakazawa, Kyoji Tomita, Nobuyoshi Nomizu:
MIXS: A mixed level simulator for large digital system logic verification. DAC 1980: 626-633

1970 – 1979

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1974
[c1]
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Akihiko Yamada, Akihiro Kawaguchi, Kazutoshi Takahashi, Shunichi Kato:
Microprogramming Design support System. DAC 1974: 137-142

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