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Xuewen Cui
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2020 – today
- 2024
- [c5]Wu-chun Feng, Xuewen Cui, Thomas Scogland, Bronis R. de Supinski:
BLP: Block-Level Pipelining for GPUs. CF 2024 - 2021
- [j2]Xuewen Cui, Wu-chun Feng:
IterML: Iterative Machine Learning for Intelligent Parameter Pruning and Tuning in Graphics Processing Units. J. Signal Process. Syst. 93(4): 391-403 (2021) - 2020
- [b1]Xuewen Cui:
Directive-Based Data Partitioning and Pipelining and Auto-Tuning for High-Performance GPU Computing. Virginia Tech, Blacksburg, VA, USA, 2020
2010 – 2019
- 2019
- [j1]Te Li, Kuo Liu, Haibo Liu, Xuewen Cui, Bin Li, Yongqing Wang:
Rapid design of a screw drive in-pipe robot based on parameterized simulation technology. Simul. 95(7) (2019) - [c4]Xuewen Cui, Wu-chun Feng:
Iterative machine learning (IterML) for effective parameter pruning and tuning in accelerators. CF 2019: 16-23 - 2017
- [c3]Xuewen Cui, Thomas R. W. Scogland, Bronis R. de Supinski, Wu-chun Feng:
Directive-Based Partitioning and Pipelining for Graphics Processing Units. IPDPS 2017: 575-584 - 2016
- [c2]Xuewen Cui, Thomas R. W. Scogland, Bronis R. de Supinski, Wu-Chun Feng:
Directive-Based Pipelining Extension for OpenMP. CLUSTER 2016: 481-484 - 2015
- [c1]Wenqiang Li, Guanghao Jin, Xuewen Cui, Simon See:
An Evaluation of Unified Memory Technology on NVIDIA GPUs. CCGRID 2015: 1092-1098
Coauthor Index
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last updated on 2024-10-07 21:23 CEST by the dblp team
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