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ORCIDHidenori Sato
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2000 – 2009
- 2009
[j5]Noriyuki Minegishi, Hidenori Sato, Fumitaka Izuhara, Masayuki Koyama, Anthony Vetro:
A multi-standards HDTV video decoder for blu-ray disc standard. IEEE Trans. Consumer Electron. 55(2): 560-563 (2009)- 2007
- [j4]Toshinori Sato, Yuu Tanaka, Hidenori Sato, Toshimasa Funaki, Takenori Koushiro, Akihiro Chiyonobu:
Realizing Energy-Efficient MultiCore Processors by Utilizing Speculative Thread-Level Parallelism. Int. J. Comput. Their Appl. 14(2): 79-91 (2007) - 2006
- [j3]Hidenori Sato, Hiroto Matsuoka, Hitoshi Kitazawa, Akira Onozawa:
Image-Based Photorealistic 3D Reconstruction Using Hexagonal Representation. Inf. Media Technol. 1(1): 275-284 (2006) - [c13]Toshinori Sato, Yuu Tanaka, Hidenori Sato, Toshimasa Funaki, Takenori Koushiro, Akihiro Chiyonobu:
Improving Energy Efficiency Via Speculative Multithreading on MultiCore Processors. PATMOS 2006: 553-562 - 2004
- [c12]Hidenori Sato, Toshinori Sato:
A static and dynamic energy reduction technique for I-cache and BTB in embedded processors. ASP-DAC 2004: 830-833 - [c11]Eiichi Hosoya, Hidenori Sato, Miki Kitabata, Ikuo Harada, Hisao Nojima, Akira Onozawa:
Arm-Pointer: 3D Pointing Interface for Real-World Interaction. ECCV Workshop on HCI 2004: 72-82 - 2003
- [c10]Eiichi Hosoya, Miki Kitabata, Hidenori Sato, Ikuo Harada, Hisao Nojima, Fumiharu Morisawa, Shinichiro Mutoh, Akira Onozawa:
A Mirror Metaphor Interaction System: Touching Remote Real Objects in an Augmented Reality Environment. ISMAR 2003: 350-351 - 2002
- [j2]Hidenori Sato, Tetsuo Nishi, Norikazu Takahashi:
Necessary and Sufficient Conditions for One-Dimensional Discrete-Time Binary Cellular Neural Networks with Unspecified Fixed Boundaries to Be Stable. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(9): 2036-2043 (2002) - [j1]Satoshi Kumaki, Hidehiro Takata, Yoshihide Ajioka, Tsukasa Ooishi, Kazuya Ishihara, Atsuo Hanami, Takaharu Tsuji, Tetsuya Watanabe, Chikayoshi Morishima, Tomoaki Yoshizawa, Hidenori Sato, Shin-ichi Hattori, Atsushi Koshio, Kazuhiro Tsukamoto, Tetsuya Matsumura:
A 99-mm2 0.7-W single-chip MPEG-2 422P@ML video, audio, and system encoder with a 64-Mb embedded DRAM for portable 422P@HL encoder system. IEEE J. Solid State Circuits 37(3): 450-454 (2002) - [c9]Hidenori Sato, Hiroto Matsuoka, Akira Onozawa, Hitoshi Kitazawa:
Hexagonal Image Representation for 3-D Photorealistic Reconstruction. ICPR (2) 2002: 672-676 - [c8]Tetsuo Nishi, Hidenori Sato, Norikazu Takahashi:
Necessary and sufficient conditions for one-dimensional discrete-time binary cellular neural networks with both A- and B-templates to be stable. ISCAS (1) 2002: 633-636 - [c7]Hiroto Matsuoka, Akira Onozawa, Hidenori Sato, Hisao Nojima:
Regeneration of real objects in the real world. SIGGRAPH Abstracts and Applications 2002: 77 - [c6]Hiroto Matsuoka, Akira Onozawa, Hidenori Sato, Hisao Nojima:
Regeneration of real objects in the real world. SIGGRAPH Abstracts and Applications 2002: 243 - 2001
- [c5]Satoshi Kumaki, Hidehiro Takata, Yoshihide Ajioka, Tsukasa Ooishi, Kazuya Ishihara, Atsuo Hanami, Takaharu Tsuji, Yusuke Kanehira, Tetsuya Watanabe, Chikayoshi Morishima, Tomoaki Yoshizawa, Hidenori Sato, Shin-ichi Hattori, Atsushi Koshio, Kazuhiro Tsukamoto, Tetsuva Matsumura:
A 99-mm2, 0.7-W, single-chip MPEG-2 422P@ML video, audio, and system encoder with a 64-Mbit embedded DRAM for portable 422P@HL encoder system. CICC 2001: 425-428 - 2000
- [c4]Hidenori Sato, Hideo Ohira, Masahiko Kazayama, Ayako Harada, Masahiko Yoshimoto, Okikazu Tanno, Satoshi Kumaki, Kazuya Ishibara, Atsuo Hanami, Tetsuya Mutsumura:
MPEG-2 4: 2: 2@HL encoder chip set. ISCAS 2000: 41-44 - [c3]Ikuo Harada, Hidenori Sato, Hitoshi Kitazawa:
Optimizing Network 3D Data Transmissions for Interactive Applications. PG 2000: 419-420
1990 – 1999
- 1999
- [c2]Satoshi Kumaki, Tetsuya Matsumura, Kamya Ishihara, Hiroshi Segawa, Kiyofumi Kawamoto, Hideo Ohira, Toshiaki Shimada, Hidenori Sato, Takashi Hattori, Tetsuro Wada, Hiroshi Honma, Tetsuya Watanabe, Hisakazu Sato, Ken'ichi Asano, Toyohiko Yoshida:
A single-chip MPEG2 422@ML video, audio, and system encoder with a 162-MHz media-processor and dual motion estimation cores. CICC 1999: 95-98 - 1996
- [c1]Hidenori Sato, Akira Onozawa, Hiroaki Matsuda:
A Balanced-Mesh Clock Routing Technique Using Circuit Partitioning. ED&TC 1996: 237-243
Coauthor Index
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