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H. S. Jatana
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2020 – today
- 2021
- [j2]Mukesh Kumar, Jagpal Singh Ubhi, Sanjeev Basra, Anuj Chawla, H. S. Jatana:
Total ionizing dose hardness analysis of transistors in commercial 180 nm CMOS technology. Microelectron. J. 115: 105182 (2021)
2010 – 2019
- 2019
- [j1]Chaudhry Indra Kumar, Ishant Bhatia, Arvind Kumar Sharma, Deep Sehgal, H. S. Jatana, Anand Bulusu:
A Physics-Based Variability-Aware Methodology to Estimate Critical Charge for Near-Threshold Voltage Latches. IEEE Trans. Very Large Scale Integr. Syst. 27(9): 2170-2179 (2019) - 2017
- [c1]Munish Malik, Ajay Kumar, H. S. Jatana:
Design & Development of High Speed LVDS Receiver with Cold-Spare Feature in SCL's 0.18 µm CMOS Process. VDAT 2017: 667-678
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