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ORCIDGuoqiang Bai 0001
Person information
- affiliation: Tsinghua University, Institute of Microelectronics, Beijing, China
Other persons with the same name
- Guoqiang Bai 0002 — Trier University, Germany
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2020 – today
- 2021
[c35]Dongmei Wei, Xingjun Wu, Guoqiang Bai, Linlin Su, Sufen Xu:
Attention-based Efficient Lightweight Model for Accurate Real-Time Face Verification on Embedded Device. ICCCS 2021: 385-392
2010 – 2019
- 2019
- [c34]Ru Ding, Xuemei Tian, Guoqiang Bai, Guangda Su, Xingjun Wu:
Hardware Implementation of Convolutional Neural Network for Face Feature Extraction. ASICON 2019: 1-4 - 2018
- [c33]Guoqiang Bai, Hailiang Fu, Wei Li, Xingjun Wu:
Differential Power Attack on SM4 Block Cipher. TrustCom/BigDataSE 2018: 1494-1497 - 2017
- [c32]Juhua Liu, Wei Li, Guoqiang Bai:
Efficient hardware implementation of ITUbee for lightweight application. ICITST 2017: 372-376 - 2016
- [c31]Haibo Yu, Guoqiang Bai:
Specific hardware implementation for cofactorization in GNFS. CITS 2016: 1-5 - [c30]Miao Yuan, Guoqiang Bai:
Detecting first-order leakages against the tower field masking scheme. CITS 2016: 1-5 - [c29]Chaohui Du, Guoqiang Bai, Xingjun Wu:
High-Speed Polynomial Multiplier Architecture for Ring-LWE Based Public Key Cryptosystems. ACM Great Lakes Symposium on VLSI 2016: 9-14 - [c28]Chaohui Du, Guoqiang Bai:
Efficient polynomial multiplier architecture for Ring-LWE based public key cryptosystems. ISCAS 2016: 1162-1165 - [c27]Chaohui Du, Guoqiang Bai:
Towards efficient polynomial multiplication for lattice-based cryptography. ISCAS 2016: 1178-1181 - [c26]Hailiang Fu, Guoqiang Bai, Xingjun Wu:
A Very Compact Masked S-Box for High-Performance Implementation of SM4 Based on Composite Field. SecureComm 2016: 710-721 - [c25]Juhua Liu, Guoqiang Bai, Xingjun Wu:
Efficient Hardware Implementation of Roadrunner for Lightweight Application. Trustcom/BigDataSE/ISPA 2016: 224-227 - [i1]Chaohui Du, Guoqiang Bai:
A Family of Scalable Polynomial Multiplier Architectures for Ring-LWE Based Cryptosystems. IACR Cryptol. ePrint Arch. 2016: 323 (2016) - 2015
- [c24]Miao Yuan, Guoqiang Bai:
Improving Second-Order DPA Attacks with New Modeled Power Leakages. CIS 2015: 394-397 - [c23]Haibo Yu, Guoqiang Bai, Huikang Hao:
Efficient Modular Reduction Algorithm Without Correction Phase. FAW 2015: 304-313 - [c22]Chaohui Du, Guoqiang Bai:
Towards efficient discrete Gaussian sampling for lattice-based cryptography. FPL 2015: 1-6 - [c21]Haibo Yu, Guoqiang Bai:
Strategy of Relations Collection in Factoring RSA Modulus. ICICS 2015: 199-211 - [c20]Dan Zhang, Guoqiang Bai:
Ultra High-Performance ASIC Implementation of SM2 with SPA Resistance. ICICS 2015: 212-219 - [c19]Haibo Yu, Guoqiang Bai:
An efficient method for integer factorization. ISCAS 2015: 73-76 - [c18]Chaohui Du, Guoqiang Bai:
A Family of Scalable Polynomial Multiplier Architectures for Lattice-Based Cryptography. TrustCom/BigDataSE/ISPA (1) 2015: 392-399 - [c17]Chaohui Du, Guoqiang Bai, Hongyi Chen:
Towards Efficient Implementation of Lattice-Based Public-Key Encryption on Modern CPUs. TrustCom/BigDataSE/ISPA (1) 2015: 1230-1236 - 2014
- [c16]Yezhen Liang, Guoqiang Bai:
A randomized window-scanning RSA scheme resistant to power analysis. ICIS 2014: 217-221 - [c15]Chaohui Du, Guoqiang Bai:
A Novel Technique for Ring Oscillator Based PUFs to Enroll Stable Challenge Response Pairs. CIT 2014: 270-275 - [c14]Zhenwei Zhao, Guoqiang Bai:
Exploring the speed limit of SM2. CCIS 2014: 456-460 - [c13]Chaohui Du, Guoqiang Bai:
A Novel Relative Frequency Based Ring Oscillator Physical Unclonable Function. CSE 2014: 569-575 - [c12]Jie Zhang, Guantong Su, Yannan Liu, Lingxiao Wei, Feng Yuan, Guoqiang Bai, Qiang Xu
:
On trojan side channel design and identification. ICCAD 2014: 278-285 - [c11]Zhenwei Zhao, Guoqiang Bai:
Ultra High-Speed SM2 ASIC Implementation. TrustCom 2014: 182-188 - [c10]Chaohui Du, Guoqiang Bai:
Attacks on Physically-Embedded Data Encryption for Embedded Devices. TrustCom 2014: 967-972 - 2011
- [c9]Tong Ran, Guoqiang Bai:
Integration of information security chips based on System-in-Package. ASICON 2011: 625-628 - [c8]Xiao Ma, Guoqiang Bai:
Design and implementation of pipelined TMVP multiplier using block recombination. ASICON 2011: 874-877 - 2010
- [j3]Haixin Wang, Guoqiang Bai, Hongyi Chen:
A Gbps IPSec SSL Security Processor Design and Implementation in an FPGA Prototyping Platform. J. Signal Process. Syst. 58(3): 311-324 (2010)
2000 – 2009
- 2009
- [c7]Jianping Quan, Guoqiang Bai:
A DPA-Resistant Digit-Parallel Modular Multiplier over GF (2m). ITNG 2009: 53-57 - [c6]Jianping Quan, Guoqiang Bai:
A New Method to Reduce the Side-Channel Leakage Caused by Unbalanced Capacitances of Differential Interconnections in Dual-Rail Logic Styles. ITNG 2009: 58-63 - 2008
- [c5]Haixin Wang, Guoqiang Bai, Hongyi Chen:
Zodiac: System architecture implementation for a high-performance Network Security Processor. ASAP 2008: 91-96 - [c4]Gang Chen, Guoqiang Bai, Hongyi Chen:
A dual-field elliptic curve cryptographic processor based on a systolic arithmetic unit. ISCAS 2008: 3298-3301 - 2007
- [j2]Gang Chen, Guoqiang Bai, Hongyi Chen:
A New Systolic Architecture for Modular Division. IEEE Trans. Computers 56(2): 282-286 (2007) - [j1]Gang Chen, Guoqiang Bai, Hongyi Chen:
A High-Performance Elliptic Curve Cryptographic Processor for General Curves Over GF(p) Based on a Systolic Arithmetic Unit. IEEE Trans. Circuits Syst. II Express Briefs 54-II(5): 412-416 (2007) - [c3]Haixin Wang, Yao Yue, Chunming Zhang, Guoqiang Bai, Hongyi Chen:
A Novel Unified Control Architecture for a High-Performance Network Security Accelerator. Security and Management 2007: 573-579 - 2006
- [c2]Run-Nian Ma, Guoqiang Bai:
Stability Conditions for Discrete Hopfield Neural Networks with Delay. ICIC (1) 2006: 476-481 - [c1]Run-Nian Ma, Guoqiang Bai:
Convergence Study of Discrete Neural Networks with Delay. ICONIP (1) 2006: 554-561
Coauthor Index
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