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Yachen Xiang
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2020 – today
- 2022
- [j3]Runze Han, Peng Huang, Yachen Xiang, Hong Hu, Sheng Lin, Peiyan Dong, Wensheng Shen, Yanzhi Wang, Xiaoyan Liu, Jinfeng Kang:
Floating Gate Transistor-Based Accurate Digital In-Memory Computing for Deep Neural Networks. Adv. Intell. Syst. 4(12) (2022) - 2021
- [j2]Runze Han, Yachen Xiang, Peng Huang, Yihao Shan, Xiaoyan Liu, Jinfeng Kang:
Flash Memory Array for Efficient Implementation of Deep Neural Networks. Adv. Intell. Syst. 3(5): 2000161 (2021) - [c5]Lixia Han, Yachen Xiang, Peng Huang, Guihai Yu, Runze Han, Xiaoyan Liu, Jinfeng Kang:
Novel Weight Mapping Method for Reliable NVM based Neural Network. IRPS 2021: 1-6
2010 – 2019
- 2019
- [j1]Runze Han, Peng Huang, Yachen Xiang, Chen Liu, Zhen Dong, Zhiqiang Su, Yongbo Liu, Lu Liu, Xiaoyan Liu, Jinfeng Kang:
A Novel Convolution Computing Paradigm Based on NOR Flash Array With High Computing Speed and Energy Efficiency. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(5): 1692-1703 (2019) - [c4]Jinfeng Kang, Peng Huang, Runze Han, Yachen Xiang, Xiaole Cui, Xiaoyan Liu:
Flash-based Computing in-Memory Scheme for IOT. ASICON 2019: 1-4 - [c3]Min Zhang, Peng Huang, Yizhou Zhang, Yachen Xiang, Runze Han, Lifeng Liu, Xiaoyan Liu, Jinfeng Kang:
FNSim: A Device-Circuit-Algorithm Codesigned Simulator for Flash based Neural Network. ASICON 2019: 1-4 - [c2]Yachen Xiang, Peng Huang, Zheng Zhou, Runze Han, Yuning Jiang, Q. M. Shu, Zhiqiang Su, Yongbo Liu, Xiaoyan Liu, Jinfeng Kang:
Analog Deep Neural Network Based on NOR Flash Computing Array for High Speed/Energy Efficiency Computation. ISCAS 2019: 1-4 - 2018
- [c1]Runze Han, Peng Huang, Yachen Xiang, Chen Liu, Zhekang Dong, Zhiqiang Su, Yongbo Liu, L. Liu, Xiaoyan Liu, Jinfeng Kang:
A Novel Convolution Computing Paradigm Based on NOR Flash Array with High Computing Speed and Energy Efficient. ISCAS 2018: 1-4
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