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2020 – today
- 2024
[j23]Masahiro Nishimura, Taito Manabe, Yuichiro Shibata:
Pipelined ADPCM Compression for HDR Synthesis on an FPGA. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 107(3): 531-539 (2024)- [c93]Daiki Furukawa, Taito Manabe, Yuichiro Shibata, Tomohiro Ueno
, Kentaro Sano:
HLS Implementation of a Building Cube Stencil Computation Framework for an FPGA Accelerator. ICCE 2024: 1-6 - [c92]Haruto Ikehara, Taito Manabe, Yuichiro Shibata, Tomohiro Ueno, Kentaro Sano:
A Productive HLS Simulation Approach for Multi-FPGA Systems. ICCE 2024: 1-2 - [c91]Shintaro Matsui, Katsuaki Kamimae, Haruto Ikehara, Takuho Kawazu, Huang Yuwei, Masahiro Nishimura, Shuto Abe, Kenyu Okino, Yuta Hashiguchi, Kengo Yanagihara, Takumi Obayashi, Kim Chaeseung, Tatsunosuke Shiota, Yukito Taguchi, Ryuki Tsuruda, Taito Manabe, Yuichiro Shibata:
Rust-Based Memory-Safe Design of SoC FPGA Unmanned Mobile Vehicles. ICCE 2024: 1-2 - 2023
- [j22]Taito Manabe, Yuichiro Shibata:
Real-Time Image-Based Vibration Extraction with Memory-Efficient Optical Flow and Block-Based Adaptive Filter. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 106(3): 504-513 (2023) - [c90]Takehiro Miura, Shuto Abe, Taito Manabe, Yuichiro Shibata, Taiichiro Kosaka, Tomohiko Adachi:
Efficient FPGA Implementation of a Convolutional Neural Network for Surgical Image Segmentation Focusing on Recursive Structure. CISIS 2023: 137-148 - [c89]Yasutoshi Araki, Takuho Kawazu, Taito Manabe, Yoichi Ishizuka, Yuichiro Shibata:
A Mobile-Oriented GPU Implementation of a Convolutional Neural Network for Object Detection. CISIS 2023: 149-160 - 2022
- [j21]Tatsuma Mori, Taito Manabe, Yuichiro Shibata:
A Hardware Oriented Approximate Convex Hull Algorithm and its FPGA Implementation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 105-A(3): 459-467 (2022) - [j20]Taito Manabe, Taichi Katayama, Yuichiro Shibata:
FPGA Implementation of a Stream-Based Real-Time Hardware Line Segment Detector. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 105-A(3): 468-477 (2022) - [j19]Taichi Saikai, Kotoko Miyata, Taito Manabe, Yuichiro Shibata:
Evaluation of Directive-based Heterogeneous Redundant Design Approaches for Functional Safety Systems on FPGAs. Int. J. Netw. Comput. 12(2): 387-405 (2022) - [c88]Yasutoshi Araki, Masatomo Matsuda, Taito Manabe, Yoichi Ishizuka, Yuichiro Shibata:
FPGA Implementation of an Object Recognition System with Low Power Consumption Using a YOLOv3-tiny-based CNN. CISIS 2022: 223-233 - [c87]Katsuaki Kamimae, Shintaro Matsui, Yasutoshi Araki, Takehiro Miura, Keigo Motoyoshi, Keizo Yamashita, Haruto Ikehara, Takuho Kawazu, Huang Yuwei, Masahiro Nishimura, Shuto Abe, Kenyu Okino, Yuta Hashiguchi, Koki Fukuda, Kengo Yanagihara, Taito Manabe, Yuichiro Shibata:
A Lane Detection Hardware Algorithm Based on Helmholtz Principle and Its Application to Unmanned Mobile Vehicles. FPT 2022: 1-4 - [c86]Masahiro Nishimura, Yuta Imamura, Taito Manabe, Yuichiro Shibata:
FPGA implementation of HDR synthesis processing with image compression techniques. FPT 2022: 1-2 - [c85]Tatsuma Mori, Daiki Furukawa, Keigo Motoyoshi, Haruto Ikehara, Kaito Ohira, Taito Manabe, Yuichiro Shibata, Tomohiro Ueno, Kentaro Sano:
Stream Computation of 3D Approximate Convex Hulls with an FPGA. HEART 2022: 69-75 - [c84]Shintaro Matsui, Taito Manabe, Yuichiro Shibata:
FPGA implementation of contour detection based on Helmholtz principle. CANDARW 2022: 411-415 - 2021
- [c83]Keigo Motoyoshi, Yuta Imamura, Taichi Saikai, Koki Fujita, Daiki Furukawa, Masatomo Matsuda, Tatsuma Mori, Yasutoshi Araki, Takehiro Miura, Keizo Yamashita, Haruto Ikehara, Kaito Ohira, Katsuaki Kamimae, Takuho Kawazu, Masahiro Nishimura, Shintaro Matsui, Koki Tomonaga, Taito Manabe, Yuichiro Shibata:
SoC FPGA implementation of an unmanned mobile vehicle with an image transmission system over VNC. FPT 2021: 1-4 - [c82]Taichi Saikai, Kotoko Miyata, Taito Manabe, Yuichiro Shibata:
Evaluation of an HLS-based heterogeneous redundant design approach for functional safety systems on FPGAs. CANDAR 2021: 162-167 - [c81]Yuta Imamura, Shota Fukui, Taito Manabe, Yuichiro Shibata:
An FPGA-based Power-saving Particle Filter Using Dynamic Reconfiguration. CANDAR (Workshops) 2021: 439-443 - 2020
- [j18]Taito Manabe, Kazuya Uetsuhara, Akane Tahara, Yuichiro Shibata:
FPGA Implementation and Evaluation of a Real-Time Image-Based Vibration Detection System with Adaptive Filtering. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 103-A(12): 1472-1480 (2020) - [j17]Taito Manabe, Koki Tomonaga, Koki Fujita, Yuichiro Shibata, Taiichiro Kosaka, Tomohiko Adachi:
CNN Architecture for Surgical Image Segmentation with Recursive Structure and Flip-Based Upsampling. Int. J. Netw. Comput. 10(2): 259-276 (2020) - [c80]Tatsuma Mori, Taito Manabe, Yuichiro Shibata:
Fast and Memory Efficient Approximated Convex Hull Computation with FPGA. CANDAR 2020: 174-180 - [c79]Hay Thar Myo Htet, Theint Theint Thu, Aung Kyaw Win, Yuichiro Shibata:
Vision-based Automatic Strawberry Shape and Size Estimation and Classification Using Raspberry Pi. SICE 2020: 360-365
2010 – 2019
- 2019
- [c78]Naofumi Yoshinaga, Ryo Kamasaka, Yuichiro Shibata, Kiyoshi Oguri:
Pipelined FPGA Implementation of a Wave-Front-Fetch Graph Cut System. CISIS 2019: 430-441 - [c77]Shota Fukui, Yuichi Kawamata, Yuichiro Shibata:
A Self-partial Reconfiguration Framework with Configuration Data Compression for Intel FPGAs. CISIS 2019: 442-452 - [c76]Takanori Itagawa, Ryo Kamasaka, Yuichiro Shibata:
A Simple Heterogeneous Redundant Design Method for Finite State Machines on FPGAs. CISIS 2019: 453-461 - [c75]Taito Manabe, Koki Tomonaga, Yuichiro Shibata:
CNN Architecture for Surgical Image Segmentation Systems with Recursive Network Structure to Mitigate Overfitting. CANDAR 2019: 171-177 - [c74]Taito Manabe, Naofumi Yoshinaga, Yuta Imamura, Taichi Saikai, Koki Fujita, Masatomo Matsuda, Kotoko Miyata, Tatsuma Mori, Yuichiro Shibata, Hiroki Egawa, Yuichi Kawamata, Tomohiro Kida, Ryouhei Tsugami, Ryohei Kakizaki, Taichi Katayama, Koki Tomonaga, Shota Fukui:
Autonomous Vehicle Driving Using the Stream-Based Real-Time Hardware Line Detector. FPT 2019: 461-464 - [c73]Yuichi Kawamata, Tomohiro Kida, Yuichiro Shibata, Kentaro Sano:
Crossbar Implementation with Partial Reconfiguration for Stream Switching Applications on an FPGA. PARCO 2019: 721-730 - [c72]Tomohiro Kida, Yuichi Kawamata, Yuichiro Shibata, Kentaro Sano:
A High Level Synthesis Approach for Application Specific DMA Controllers. ReConFig 2019: 1-2 - 2018
- [j16]Taito Manabe, Yuichiro Shibata, Kiyoshi Oguri:
FPGA Implementation of a Real-Time Super-Resolution System Using Flips and an RNS-Based CNN. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 101-A(12): 2280-2289 (2018) - [c71]Ryouhei Tsugami, Yuichiro Shibata:
FPGA Implementation of Lightweight Communication Protocol Processing for IoT. CISIS 2018: 506-517 - [c70]Kunihiro Ueda, Keisuke Dohi, Yuichiro Shibata:
Light-Weight Fine-Grain Dynamic Partial Reconfiguration on Xilinx FPGAs. CISIS 2018: 518-526 - [c69]Kazuya Uetsuhara, Hiroki Nagayama, Yuichiro Shibata, Kiyoshi Oguri:
Discussion on High Level Synthesis FPGA Design of Camera Calibration. CISIS 2018: 538-549 - [c68]Hiroki Egawa, Yuichiro Shibata:
Storing and Compressing Video into Neural Networks by Overfitting. CISIS 2018: 615-626 - [c67]Kazuya Uetsuhara, Akane Tahara, Taito Manabe, Yuichiro Shibata:
Implementation of a Real-Time Image-Based Vibration Detection and Adaptive Filtering on an FPGA. DASIP 2018: 54-59 - [c66]Ryo Kamasaka, Yuichiro Shibata, Kiyoshi Oguri:
An FPGA-oriented Graph Cut Algorithm for Accelerating Stereo Vision. ReConFig 2018: 1-6 - [p1]Motoki Amagasaki, Yuichiro Shibata:
FPGA Structure. Principles and Structures of FPGAs 2018: 47-86 - [i1]Kiyoshi Oguri, Yuichiro Shibata:
A new stereo formulation not using pixel and disparity models. CoRR abs/1803.01516 (2018) - 2017
- [j15]Hidenori Maruta, Tsutomu Sakai, Suguru Sagara, Yuichiro Shibata, Keiichi Hirose, Fujio Kurokawa:
Flexible Load-Dependent Soft-Start Method for Digital PID Control DC-DC Converter in 380Vdc System. IEICE Trans. Commun. 100-B(4): 518-528 (2017) - [j14]Theint Theint Thu, Jimpei Hamamura, Rie Soejima, Yuichiro Shibata, Kiyoshi Oguri:
Comparative Evaluation of FPGA Implementation Alternatives for Real-Time Robust Ellipse Estimation based on RANSAC Algorithm. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 100-A(7): 1409-1417 (2017) - [j13]Theint Theint Thu, Yoshiki Hayashida, Akane Tahara, Yuichiro Shibata, Kiyoshi Oguri:
Deep-pipelined FPGA Implementation of Real-time Object Tracking using a Particle Filter. Int. J. Netw. Comput. 7(2): 372-386 (2017) - [c65]Akane Tahara, Yoshiki Hayashida, Theint Theint Thu, Yuichiro Shibata, Kiyoshi Oguri:
Power Performance Analysis of FPGA-Based Particle Filtering for Realtime Object Tracking. CISIS 2017: 451-462 - [c64]Rie Soejima, Yuichiro Shibata, Kiyoshi Oguri:
HLS-Based FPGA Acceleration of Building-Cube Stencil Computation. CISIS 2017: 463-474 - [c63]Taito Manabe, Yuichiro Shibata, Kiyoshi Oguri:
FPGA implementation of a real-time super-resolution system with a CNN based on a residue number system. FPT 2017: 299-300 - [c62]Ryo Kamasaka, Yuichiro Shibata, Kiyoshi Oguri:
FPGA Implementation of A Graph Cut Algorithm For Stereo Vision. HEART 2017: 14:1-14:6 - 2016
- [c61]Masahito Oishi, Yoshiki Hayashida, Ryo Fujita, Yuichiro Shibata, Kiyoshi Oguri:
A Comparison of Machine Learning Classifiers for FPGA Implementation of HOG-Based Human Detection. ARC 2016: 91-104 - [c60]Yudai Shirakura, Taisei Segawa, Yuichiro Shibata, Kenichi Morimoto, Masaharu Tanaka, Masanori Nobe, Hidenori Maruta, Fujio Kurokawa:
A Redundant Design Approach with Diversity of FPGA Resource Mapping. ARC 2016: 119-131 - [c59]Taito Manabe, Yuichiro Shibata, Kiyoshi Oguri:
FPGA implementation of a real-time super-resolution system using a convolutional neural network. FPT 2016: 249-252 - [c58]Akane Tahara, Yoshiki Hayashida, Theint Theint Thu, Yuichiro Shibata, Kiyoshi Oguri:
FPGA-based Real-Time Object Tracking Using a Particle Filter with Stream Architecture. CANDAR 2016: 422-428 - 2015
- [j12]Keisuke Dohi, Koji Okina, Rie Soejima, Yuichiro Shibata, Kiyoshi Oguri:
Performance Modeling of Stencil Computing on a Stream-Based FPGA Accelerator for Efficient Design Space Exploration. IEICE Trans. Inf. Syst. 98-D(2): 298-308 (2015) - [j11]Koji Okina, Rie Soejima, Kota Fukumoto, Yuichiro Shibata, Kiyoshi Oguri:
Power Performance Profiling of 3-D Stencil Computation on an FPGA Accelerator for Efficient Pipeline Optimization. SIGARCH Comput. Archit. News 43(4): 9-14 (2015) - [c57]Aiko Iwasaki, Yuichiro Shibata, Kiyoshi Oguri, Ryuichi Harasawa:
An energy-efficient FPGA-based soft-core processor with a configurable word size ECC arithmetic accelerator. COOL Chips 2015: 1-3 - 2014
- [j10]Rie Soejima, Koji Okina, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri:
A Memory Profiling Framework for Stencil Computation on an FPGA Accelerator with High Level Synthesis. SIGARCH Comput. Archit. News 42(4): 69-74 (2014) - [c56]Kaoru Hamasaki, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri:
FPGA Implementation of a Video Based Abnormal Action Detection System with Real-Time Cubic Higher Order Local Auto-Correlation Analysis. ARC 2014: 191-196 - [c55]Aiko Iwasaki, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri, Ryuichi Harasawa:
A soft-core processor for finite field arithmetic with a variable word size accelerator. FPL 2014: 1-4 - [e1]Jialin Chen, Wenbo Yin, Yuichiro Shibata, Lingli Wang, Hayden Kwok-Hay So, Yuchun Ma:
2014 International Conference on Field-Programmable Technology, FPT 2014, Shanghai, China, December 10-12, 2014. IEEE 2014, ISBN 978-1-4799-6245-7 [contents] - 2013
- [j9]Keisuke Dohi, Kazuhiro Negi, Yuichiro Shibata, Kiyoshi Oguri:
FPGA Implementation of Human Detection by HOG Features with AdaBoost. IEICE Trans. Inf. Syst. 96-D(8): 1676-1684 (2013) - [c54]Kota Aoki, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri, Takafumi Fujimoto:
A Fast Runtime Visualization of a GPU-Based 3D-FDTD Electromagnetic Simulation. CANDAR 2013: 30-37 - [c53]Keisuke Dohi, Kota Fukumoto, Yuichiro Shibata, Kiyoshi Oguri:
Performance modeling and optimization of 3-D stencil computation on a stream-based FPGA accelerator. ReConFig 2013: 1-6 - 2012
- [j8]Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri, Takafumi Fujimoto:
Implementation of a GPU-Oriented Absorbing Boundary Condition for 3D-FDTD Electromagnetic Simulation. IEICE Trans. Inf. Syst. 95-D(12): 2787-2795 (2012) - [j7]Takeshi Kakimoto, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri:
Performance comparison of GPU programming frameworks with the striped Smith-Waterman algorithm. SIGARCH Comput. Archit. News 40(5): 70-75 (2012) - [c52]Keisuke Dohi, Yuma Hatanaka, Kazuhiro Negi, Yuichiro Shibata, Kiyoshi Oguri:
Deep-pipelined FPGA implementation of ellipse estimation for eye tracking. FPL 2012: 458-463 - 2011
- [j6]Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri, Takafumi Fujimoto:
GPU implementation and optimization of electromagnetic simulation using the FDTD method for antenna designing. SIGARCH Comput. Archit. News 39(4): 26-31 (2011) - [j5]Kohei Matsunobu, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri:
A discussion on calculating eigenvalues of real symmetric tridiagonal matrices on a GPU. SIGARCH Comput. Archit. News 39(4): 100-101 (2011) - [c51]Keisuke Dohi, Yuji Yorita, Yuichiro Shibata, Kiyoshi Oguri:
Pattern Compression of FAST Corner Detection for Efficient Hardware Implementation. FPL 2011: 478-481 - [c50]Kazuhiro Negi, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri:
Deep pipelined one-chip FPGA implementation of a real-time image-based human detection algorithm. FPT 2011: 1-8 - [c49]Tomonari Masada, Atsuhiro Takasu, Yuichiro Shibata, Kiyoshi Oguri:
Semi-supervised Bibliographic Element Segmentation with Latent Permutations. ICADL 2011: 60-69 - [c48]Tomonari Masada, Yuichiro Shibata, Kiyoshi Oguri:
Documents as a Bag of Maximal Substrings - An Unsupervised Feature Extraction for Document Clustering. ICEIS (1) 2011: 5-13 - [c47]Tomonari Masada, Atsuhiro Takasu, Yuichiro Shibata, Kiyoshi Oguri:
Clustering Documents with Maximal Substrings. ICEIS 2011: 19-34 - [c46]Tomonari Masada, Atsuhiro Takasu, Yuichiro Shibata, Kiyoshi Oguri:
Steering Time-Dependent Estimation of Posteriors with Hyperparameter Indexing in Bayesian Topic Models. PAKDD (1) 2011: 435-447 - 2010
- [j4]Hideki Yamada, Yui Ogawa, Tomonori Ooya, Tomoya Ishimori, Yasunori Osana, Masato Yoshimi, Yuri Nishikawa, Akira Funahashi, Noriko Hiroi, Hideharu Amano, Yuichiro Shibata, Kiyoshi Oguri:
Automatic Pipeline Construction Focused on Similarity of Rate Law Functions for an FPGA-based Biochemical Simulator. IPSJ Trans. Syst. LSI Des. Methodol. 3: 244-256 (2010) - [j3]Keisuke Dohi, Yuichiro Shibata, Tsuyoshi Hamada, Tomonari Masada, Kiyoshi Oguri, Duncan A. Buell:
Implementation of a programming environment with a multithread model for reconfigurable systems. SIGARCH Comput. Archit. News 38(4): 40-45 (2010) - [c45]Keisuke Dohi, Khaled Benkrid, Cheng Ling, Tsuyoshi Hamada, Yuichiro Shibata:
Highly efficient mapping of the Smith-Waterman algorithm on CUDA-compatible GPUs. ASAP 2010: 29-36 - [c44]Tomonari Masada, Yuichiro Shibata, Kiyoshi Oguri:
Infinite latent process decomposition. BIBM Workshops 2010: 810-811 - [c43]Yui Ogawa, Tomonori Ooya, Yasunori Osana, Masato Yoshimi, Yuri Nishikawa, Akira Funahashi, Noriko Hiroi, Hideharu Amano, Yuichiro Shibata, Kiyoshi Oguri:
A datapath classification method for FPGA-based scientific application accelerator systems. FPT 2010: 441-444 - [c42]Tomonari Masada, Daiji Fukagawa, Atsuhiro Takasu, Yuichiro Shibata, Kiyoshi Oguri:
Modeling Topical Trends over Continuous Time with Priors. ISNN (2) 2010: 302-311 - [c41]Tomonari Masada, Yuichiro Shibata, Kiyoshi Oguri:
Unsupervised Segmentation of Bibliographic Elements with Latent Permutations. WISE Workshops 2010: 254-267
2000 – 2009
- 2009
- [j2]Tsuyoshi Hamada, Keigo Nitadori, Khaled Benkrid, Yousuke Ohno, Gentaro Morimoto, Tomonari Masada, Yuichiro Shibata, Kiyoshi Oguri, Makoto Taiji:
A novel multiple-walk parallel algorithm for the Barnes-Hut treecode on GPUs - towards cost effective, high performance N-body simulation. Comput. Sci. Res. Dev. 24(1-2): 21-31 (2009) - [c40]Tomonari Masada, Tsuyoshi Hamada, Yuichiro Shibata, Kiyoshi Oguri:
Bayesian Multi-topic Microarray Analysis with Hyperparameter Reestimation. ADMA 2009: 253-264 - [c39]Kentaro Matsuo, Tsuyoshi Hamada, Masayuki Miyoshi, Yuichiro Shibata, Kiyoshi Oguri:
Accelerating Phase Correlation Functions Using GPU and FPGA. AHS 2009: 433-438 - [c38]Tomoya Ishimori, Hideki Yamada, Yuichiro Shibata, Yasunori Osana, Masato Yoshimi, Yuri Nishikawa, Hideharu Amano, Akira Funahashi, Noriko Hiroi, Kiyoshi Oguri:
Pipeline Scheduling with Input Port Constraints for an FPGA-Based Biochemical Simulator. ARC 2009: 368-373 - [c37]Tomonari Masada, Daiji Fukagawa, Atsuhiro Takasu, Tsuyoshi Hamada, Yuichiro Shibata, Kiyoshi Oguri:
Dynamic hyperparameter optimization for bayesian topical trend analysis. CIKM 2009: 1831-1834 - [c36]Tomonori Ooya, Hideki Yamada, Tomoya Ishimori, Yuichiro Shibata, Yasunori Osana, Kiyoshi Oguri, Masato Yoshimi, Yuri Nishikawa, Akira Funahashi, Noriko Hiroi, Hideharu Amano:
Configuring area and performance: Empirical evaluation on an FPGA-based biochemical simulator. FPL 2009: 679-682 - [c35]Tomonari Masada, Tsuyoshi Hamada, Yuichiro Shibata, Kiyoshi Oguri:
Accelerating Collapsed Variational Bayesian Inference for Latent Dirichlet Allocation with Nvidia CUDA Compatible Devices. IEA/AIE 2009: 491-500 - [c34]Hideki Yamada, Yasunori Osana, Tomoya Ishimori, Tomonori Ooya, Masato Yoshimi, Yuri Nishikawa, Akira Funahashi, Noriko Hiroi, Hideharu Amano, Yuichiro Shibata, Kiyoshi Oguri:
A Modular Approach to Heterogeneous Biochemical Model Simulation on an FPGA. ReConFig 2009: 125-130 - [c33]Tomonari Masada, Atsuhiro Takasu, Tsuyoshi Hamada, Yuichiro Shibata, Kiyoshi Oguri:
Bag of Timestamps: A Simple and Efficient Bayesian Chronological Mining. APWeb/WAIM 2009: 556-561 - 2008
- [c32]Hidenori Matsubayashi, Shinsuke Nino, Toru Aramaki, Yuichiro Shibata, Kiyoshi Oguri:
Retrieving 3-d information with FPGA-based stream processing. FPGA 2008: 261 - [c31]Sayaka Shida, Yuichiro Shibata, Kiyoshi Oguri, Duncan A. Buell:
An optimization method of DMA transfer for a general purpose reconfigurable machine. FPL 2008: 647-650 - [c30]Masato Yoshimi, Yuri Nishikawa, Yasunori Osana, Akira Funahashi, Yuichiro Shibata, Hideki Yamada, Noriko Hiroi, Hiroaki Kitano, Hideharu Amano:
Practical implementation of a network-based stochastic biochemical simulation system on an FPGA. FPL 2008: 663-666 - 2007
- [j1]Miwa Miyata, Yuichiro Shibata, Kiyoshi Oguri:
An optimization method focusing on fixed-point arithmetic in applications for dynamically reconfigurable processor. Syst. Comput. Jpn. 38(14): 20-28 (2007) - [c29]Masato Yoshimi, Yow Iwaoka, Yuri Nishikawa, Toshinori Kojima, Yasunori Osana, Akira Funahashi, Noriko Hiroi, Yuichiro Shibata, Naoki Iwanaga, Hideki Yamada, Hiroaki Kitano, Hideharu Amano:
FPGA Implementation of a Data-Driven Stochastic Biochemical Simulator with the Next Reaction Method. FPL 2007: 254-259 - [c28]Sayaka Shida, Yuichiro Shibata, Kiyoshi Oguri, Duncan A. Buell:
Implementation of a barotropic operator for ocean model simulation using a reconfigurable machine. FPL 2007: 589-592 - [c27]Hideki Yamada, Naoki Iwanaga, Yuichiro Shibata, Yasunori Osana, Masato Yoshimi, Yow Iwaoka, Yuri Nishikawa, Toshinori Kojima, Hideharu Amano, Akira Funahashi, Noriko Hiroi, Hiroaki Kitano, Kiyoshi Oguri:
A Combining technique of rate law functions for a cost-effective reconfigurable biological simulator. FPL 2007: 808-811 - [c26]Masato Yoshimi, Yuri Nishikawa, Toshinori Kojima, Yasunori Osana, Akira Funahashi, Noriko Hiroi, Yuichiro Shibata, Hideki Yamada, Hiroaki Kitano, Hideharu Amano:
A Framework for Implementing a Network-Based Stochastic Biochemical Simulator on an FPGA. FPT 2007: 193-200 - [c25]Shinsuke Nino, Takayuki Mori, YoungHun Ko, Yuichiro Shibata, Kiyoshi Oguri:
FPGA Implementation of a Statically Reconfigurable Java Environment for Embedded Systems. FPT 2007: 317-320 - 2006
- [c24]Miwa Miyata, Hideyuki Tsuchiya, Yuichiro Shibata, Kiyoshi Oguri:
An Implementation Technique of Multi-Cycled Arithmetic Functions For a Dynamically Reconfigurable Processor. FPL 2006: 1-4 - [c23]Yasunori Osana, Masato Yoshimi, Akira Funahashi, Noriko Hiroi, Yuichiro Shibata, Naoki Iwanaga, Hiroaki Kitano, Hideharu Amano:
Performance Evaluation of an Fpga-Based Biochemical Simulator ReCSip. FPL 2006: 1-6 - [c22]Masato Yoshimi, Yasunori Osana, Yow Iwaoka, Yuri Nishikawa, Toshinori Kojima, Akira Funahashi, Noriko Hiroi, Yuichiro Shibata, Naoki Iwanaga, Hiroaki Kitano, Hideharu Amano:
An FPGA Implementation of High Throughput Stochastic Simulator for Large-Scale Biochemical Systems. FPL 2006: 1-6 - 2005
- [c21]Taichi Nagamoto, Satoshi Yano, Mitsuru Uchida, Yuichiro Shibata, Kiyoshi Oguri:
New Area Management Method Based on "Pressure" for Plastic Cell Architecture. EUC 2005: 418-427 - [c20]Shinya Kyusaka, Hayato Higuchi, Taichi Nagamoto, Yuichiro Shibata, Kiyoshi Oguri:
Evaluation of Space Allocation Circuits. EUC 2005: 428-437 - [c19]Yasunori Osana, Yow Iwaoka, Tomonori Fukushima, Masato Yoshimi, Akira Funahashi, Noriko Hiroi, Yuichiro Shibata, Naoki Iwanaga, Hiroaki Kitano, Hideharu Amano:
A Framework for ODE-Based Multimodel Biochemical Simulations on an FPGA. FPL 2005: 574-577 - [c18]Naoki Iwanaga, Yuichiro Shibata, Masato Yoshimi, Yasunori Osana, Yow Iwaoka, Tomonori Fukushima, Hideharu Amano, Akira Funahashi, Noriko Hiroi, Hiroaki Kitano, Kiyoshi Oguri:
Efficient Scheduling of Rate Law Functions for ODE-Based Multimodel Biochemical Simulation on an FPGA. FPL 2005: 666-669 - [c17]Masato Yoshimi, Yasunori Osana, Yow Iwaoka, Akira Funahashi, Noriko Hiroi, Yuichiro Shibata, Naoki Iwanaga, Hiroaki Kitano, Hideharu Amano:
The Design of Scalable Stochastic Biochemical Simulator on FPGA. FPT 2005: 339-340 - [c16]Yasunori Osana, Tomonori Fukushima, Masato Yoshimi, Yow Iwaoka, Yuichiro Shibata, Hiroaki Kitano, Akira Funahashi, Noriko Hiroi, Hideharu Amano:
An FPGA-Based, Multi-model Simulation Method for Biochemical Systems. IPDPS 2005 - 2004
- [c15]Takehiro Ito, Yuichiro Shibata, Kiyoshi Oguri:
Implementation of the Extended Euclidean Algorithm for the Tate Pairing on FPGA. FPL 2004: 911-916 - 2003
- [c14]Kiyoshi Oguri, Yuichiro Shibata, Akira Nagoya:
Asynchronous Bit-Serial Datapath for Object-Oriented Reconfigurable Architecture PCA. Asia-Pacific Computer Systems Architecture Conference 2003: 54-68 - 2001
- [c13]Daisuke Kawakami, Yuichiro Shibata, Hideharu Amano:
A prototype chip of multicontext FPGA with DRAM for virtual hardware. ASP-DAC 2001: 17-18 - 2000
- [c12]Ou Yamamoto, Yuichiro Shibata, Hitoshi Kurosawa, Hideharu Amano:
A Reconfigurable Stochastic Model Simulator for Analysis of Parallel Systems. FCCM 2000: 291-294 - [c11]Yuichiro Shibata, Masaki Uno, Hideharu Amano, Koichiro Furuta, Taro Fujii, Masato Motomura:
A Virtual Hardware System on a Dynamically Reconfigurable Logic Device. FCCM 2000: 295-296 - [c10]Ou Yamamoto, Yuichiro Shibata, Hitoshi Kurosawa, Hideharu Amano:
A Reconfigurable Stochastic Model Simulator for Analysis of Parallel Systems. FPL 2000: 475-484 - [c9]Hideharu Amano, Yuichiro Shibata, Masaki Uno:
Reconfigurable Systems: New Activities in Asia. FPL 2000: 585-594 - [c8]Atsushi Takayama, Yuichiro Shibata, Keisuke Iwai, Hideharu Amano:
Dataflow Partitioning and Scheduling Algorithms for WASMII, a Virtual Hardware. FPL 2000: 685-694
1990 – 1999
- 1999
- [c7]Atsushi Takayama, Yuichiro Shibata, Keisuke Iwai, Hidenori Miyazaki, Koichi Higure, Xiao-ping Ling, Hideharu Amano:
Implementation and Evaluation of the Compiler for WASMII, a Virtual Hardware System. ICPP Workshops 1999: 346-351 - [c6]Yuichiro Shibata, Xiao-ping Ling, Hideharu Amano:
Internal Parallelization of Data-Driven Virtual Hardware. ICPP Workshops 1999: 366-373 - 1998
- [c5]Hideharu Amano, Yuichiro Shibata:
Reconfigurable Systems: Activities in Asia and South Pacific (Embedded Tutorial). ASP-DAC 1998: 453-457 - [c4]Yuichiro Shibata, Hidenori Miyazaki, Xiao-ping Ling, Hideharu Amano:
HOSMII: A Virtual Hardware Integrated with DRAM. IPPS/SPDP Workshops 1998: 85-90 - 1997
- [c3]Kazumasa Nukata, Yuichiro Shibata, Hideharu Amano, Yuichiro Anzai:
A reconfigurable sensor-data processing system for personal robots. FPL 1997: 491-500 - [c2]Xiao-ping Ling, Yuichiro Shibata, Hidenori Miyazaki, Hideharu Amano, Koichi Higure:
Total System Image of the Reconfigurable Machine WASMII. PDPTA 1997: 1092-1096 - 1996
- [c1]Yuichiro Shibata, Xiao-ping Ling, Hideharu Amano:
An Emulation System of the WASMII: A Data Driven Computer on a Virtual Hardware. FPL 1996: 55-64
Coauthor Index
[c78] [j16] [c69] [c66] [i1] [j14] [j13] [c65] [c64] [c63] [c62] [c61] [c59] [c58] [j12] [j11] [c57] [j10] [c56] [c55] [j9] [c54] [c53] [j8] [j7] [c52] [j6] [j5] [c51] [c50] [c49] [c48] [c47] [c46] [j4] [j3] [c44] [c43] [c42] [c41] [j2] [c40] [c39] [c38] [c37] [c36] [c35] [c34] [c33] [c32] [c31] [j1] [c28] [c27] [c25] [c24] [c21] [c20] [c18] [c15] [c14]
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