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2010 – 2019
- 2012
[b1]Volker Hampel:
Leistungsbewertung und -analyse hybrider Rechnersysteme auf FPGA- und GPU-Basis. University of Lübeck, 2012- [c7]Volker Hampel, Thilo Pionteck
, Erik Maehle:
An Approach for Performance Estimation of Hybrid Systems with FPGAs and GPUs as Coprocessors. ARCS 2012: 160-171 - 2011
- [c6]Volker Hampel, Grigori Goronzy, Erik Maehle:
A Code-Based Analytical Approach for Using Separate Device Coprocessors in Computing Systems. ARCS 2011: 1-12 - 2010
- [c5]Volker Hampel, Erik Maehle:
High-Level Application Design for Hybrid Computing Systems. ARCS Workshops 2010: 113-119
2000 – 2009
- 2008
- [j1]Volker Hampel, Peter Sobe, Erik Maehle:
Experiences with a FPGA-based Reed/Solomon-encoding coprocessor. Microprocess. Microsystems 32(5-6): 313-320 (2008) - [c4]Volker Hampel, Peter Sobe, Erik Maehle:
Designing coprocessors for hybrid compute systems. IPDPS 2008: 1-8 - 2007
- [c3]Peter Sobe, Volker Hampel:
FPGA-Accelerated Deletion-Tolerant Coding for Reliable Distributed Storage. ARCS 2007: 14-27 - [c2]Volker Hampel, Peter Sobe, Erik Maehle:
Experiences with a FPGA-based Reed/Solomon Encoding Coprocessor. DSD 2007: 77-84 - 2006
- [c1]Peter Zipf, Volker Hampel, Manfred Glesner, Thilo Pionteck:
Eine Scheduling Heuristik zur Minimierung der Verlustleistung. MBMV 2006: 51-60
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