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Changuk Lee
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- affiliation: Yonsei University, Seoul, South Korea
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2020 – today
- 2024
- [j8]Moon Hyung Jang, Maddy Hays, Wei-Han Yu, Changuk Lee, Pietro Caragiulo, Athanasios T. Ramkaj, Pingyu Wang, A. J. Phillips, Nick Vitale, Pulkit Tandon, Pumiao Yan, Pui-In Mak, Youngcheol Chae, E. J. Chichilnisky, Boris Murmann, Dante G. Muratore:
A 1024-Channel 268-nW/Pixel 36×36 μm2/Channel Data-Compressive Neural Recording IC for High-Bandwidth Brain-Computer Interfaces. IEEE J. Solid State Circuits 59(4): 1123-1136 (2024) - [c13]Taejune Jeon, Byeongseol Kim, Changuk Lee, Danbi Ahn, Daerl Park, Jaesuk Sung, Hee Young Kim, Heonjin Choi, Joonsung Bae, Youngcheol Chae:
A Wireless Neurostimulator Using Body-Coupled Link for Multisite Stimulation in Freely Behaving Animals. VLSI Technology and Circuits 2024: 1-2 - 2023
- [j7]Yongtae Lee, Byeonghwa Cho, Changuk Lee, Jongbaeg Kim, Youngcheol Chae:
A 0.5-ms 47.5-nJ Resistor-to-Digital Converter for Resistive BTEX Sensor Achieving 0.1-to-5 ppb Resolution. IEEE J. Solid State Circuits 58(3): 827-837 (2023) - [j6]Hyunchul Yoon, Changuk Lee, Taewoong Kim, Yigi Kwon, Youngcheol Chae:
A 65-dB-SNDR Pipelined SAR ADC Using PVT-Robust Capacitively Degenerated Dynamic Amplifier. IEEE J. Solid State Circuits 58(4): 961-971 (2023) - [c12]Yigi Kwon, Sangwoo Lee, Changuk Lee, Hyunchul Yoon, Byounghan Min, Youngcheol Chae:
An 11bit 360MS/s Pipelined SAR ADC with Dynamic Negative-C Assisted Residue Amplifier. A-SSCC 2023: 1-3 - [c11]Junghyun Yoon, Moon Hyung Jang, Changuk Lee, Yong Lim, Youngcheol Chae:
A 243μW 97.4dB-DR 50kHz-BW Multi-Rate CT Zoom ADC with Inherent DAC Mismatch Tolerance. CICC 2023: 1-2 - [c10]Moon Hyung Jang, Wei-Han Yu, Changuk Lee, Maddy Hays, Pingyu Wang, Nick Vitale, Pulkit Tandon, Pumiao Yan, Pui-In Mak, Youngcheol Chae, E. J. Chichilnisky, Boris Murmann, Dante G. Muratore:
A 1024-Channel 268 nW/pixel 36x36 μm2/ch Data-Compressive Neural Recording IC for High-Bandwidth Brain-Computer Interfaces. VLSI Technology and Circuits 2023: 1-2 - 2022
- [j5]Hyeyeon Lee, Changuk Lee, Inhee Lee, Youngcheol Chae:
A 0.033-mm2 21.5-aF to 114.9-aF Resolution Continuous-Time Δ Σ Capacitance-to-Digital Converter Achieving Parasitic Capacitance Immunity Up to 480 pF. IEEE J. Solid State Circuits 57(10): 3048-3057 (2022) - [j4]Changuk Lee, Byeongseol Kim, Jejung Kim, Sangwon Lee, Taejune Jeon, Woojun Choi, Sunggu Yang, Jong-Hyun Ahn, Joonsung Bae, Youngcheol Chae:
A Miniaturized Wireless Neural Implant With Body-Coupled Power Delivery and Data Transmission. IEEE J. Solid State Circuits 57(11): 3212-3227 (2022) - [c9]Changuk Lee, Byeongseol Kim, Jejung Kim, Sangwon Lee, Taejune Jeon, Woojun Choi, Sunggu Yang, Jong-Hyun Ahn, Joonsung Bae, Youngcheol Chae:
A Miniaturized Wireless Neural Implant with Body-Coupled Data Transmission and Power Delivery for Freely Behaving Animals. ISSCC 2022: 1-3 - 2021
- [j3]Moon Hyung Jang, Changuk Lee, Youngcheol Chae:
A 134-μW 99.4-dB SNDR Audio Continuous-Time Delta-Sigma Modulator With Chopped Negative-R and Tri-Level FIR-DAC. IEEE J. Solid State Circuits 56(6): 1761-1771 (2021) - [c8]Hyeyeon Lee, Changuk Lee, Jae-Youl Lee, Yoon-Kyung Choi, Youngcheol Chae:
A 0.033-mm2 21.5-aF Resolution Continuous-Time Delta-Sigma Capacitance-to-Digital Converter with Parasitic Capacitance Immunity up to 480pF. A-SSCC 2021: 1-3 - [c7]Youngcheol Chae, Moon Hyung Jang, Changuk Lee, Sangwoo Lee, Seung-Woo Song:
A Negative R-Assisted Amplifier on the Virtual Ground and Its Applications. CICC 2021: 1-6 - [c6]Yongtae Lee, Byeonghwa Cho, Changuk Lee, Jongbaeg Kim, Youngcheol Chae:
A 47.5nJ Resistor-to-Digital Converter for Detecting BTEX with 0.06ppb-Resolution. VLSI Circuits 2021: 1-2 - 2020
- [j2]Changuk Lee, Taejune Jeon, Moon Hyung Jang, Sanggeon Park, Jejung Kim, Jeongsik Lim, Jong-Hyun Ahn, Yeowool Huh, Youngcheol Chae:
A 6.5-μW 10-kHz BW 80.4-dB SNDR Gm-C-Based CT ∆∑ Modulator With a Feedback-Assisted Gm Linearization for Artifact-Tolerant Neural Recording. IEEE J. Solid State Circuits 55(11): 2889-2901 (2020) - [c5]Jaewook Kwon, Changuk Lee, Youngcheol Chae, Boris Murmann:
Design Considerations for External Compensation Approaches to OLED Display Degradation. ISCAS 2020: 1-5 - [c4]Moon Hyung Jang, Changuk Lee, Youngcheol Chae:
9.2 A 134µW 24kHz-BW 103.5d8-DR CT ΔΣ Modulator with Chopped Negative-R and Tri-Level FIR DAC. ISSCC 2020: 1-3 - [c3]Yunhong Kim, Sungsik Park, Seung-Woo Song, Sangwoo Lee, Moon Hyung Jang, Changuk Lee, Youngcheol Chae:
23.8 A 41μW 16MS/s 99.2dB-SFDR Capacitively Degenerated Dynamic Amplifier with Nonlinear-Slope-Factor Compensation. ISSCC 2020: 358-360 - [c2]Changuk Lee, Taejune Jeon, Moon Hyung Jang, Sanggeon Park, Yeowool Huh, Youngcheol Chae:
26.6 A 6.5µW 10kHz-BW 80.4dB-SNDR Continuous-Time ΔΣ Modulator with Gm-Input and 300mVpp Linear Input Range for Closed-Loop Neural Recording. ISSCC 2020: 410-412
2010 – 2019
- 2019
- [j1]Moon Hyung Jang, Changuk Lee, Youngcheol Chae:
Analysis and Design of Low-Power Continuous-Time Delta-Sigma Modulator Using Negative-R Assisted Integrator. IEEE J. Solid State Circuits 54(1): 277-287 (2019) - [c1]Seung-Woo Song, Changuk Lee, Moon Hyung Jang, Youngcheol Chae:
A 185 μW -105.1 dB THD 88.6 dB SNDR Negative-R Stabilized Audio Preamplifier. ESSCIRC 2019: 261-264
Coauthor Index
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last updated on 2024-11-15 19:30 CET by the dblp team
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