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Kumar N. Dwarakanath
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2000 – 2009
- 2006
- [j1]Ronald D. Blanton, Kumar N. Dwarakanath, Rao Desineni:
Defect Modeling Using Fault Tuples. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(11): 2450-2464 (2006) - [c8]Miron Abramovici, Paul Bradley, Kumar N. Dwarakanath, Peter Levin, Gérard Memmi, Dave Miller:
A reconfigurable design-for-debug infrastructure for SoCs. DAC 2006: 7-12 - 2004
- [c7]Chunsheng Liu, Kumar N. Dwarakanath, Krishnendu Chakrabarty, Ronald D. Blanton:
Compact Dictionaries for Diagnosis of Unmodeled Faults in Scan-BIST. ISVLSI 2004: 173-178 - [c6]Sounil Biswas, Kumar N. Dwarakanath, R. D. (Shawn) Blanton:
Generalized Sensitization using Fault Tuples. VTS 2004: 297-303 - 2003
- [c5]R. D. (Shawn) Blanton, Kumar N. Dwarakanath, Anirudh B. Shah:
Analyzing the Effectiveness of Multiple-Detect Test Sets. ITC 2003: 876-885 - 2002
- [c4]Ronald D. Blanton, John T. Chen, Rao Desineni, Kumar N. Dwarakanath, Wojciech Maly, Thomas J. Vogels:
Fault Tuples in Diagnosis of Deep-Submicron Circuits. ITC 2002: 233-241 - [c3]Kumar N. Dwarakanath, R. D. (Shawn) Blanton:
Exploiting Dominance and Equivalence using Fault Tuples. VTS 2002: 269-274 - 2000
- [c2]Kumar N. Dwarakanath, Ronald D. Blanton:
Universal fault simulation using fault tuples. DAC 2000: 786-789 - [c1]Rao Desineni, Kumar N. Dwarakanath, Ronald D. Blanton:
Universal test generation using fault tuples. ITC 2000: 812-819
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