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Wan-Hsuan Hsieh
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2020 – today
- 2024
- [c5]Zefu Zhao, Yu-Rui Chen, Yu-Tsung Liao, Yun-Wen Chen, Wan-Hsuan Hsieh, Jer-Fu Wang, Yu-An Chen, Hao-Yi Lu, Wei-Teng Hsu, Dai-Ying Lee, Ming-Hsiu Lee, C. W. Liu:
Engineering HZO by Flat Amorphous TiN with 0.3nm Roughness Achieving Uniform c-Axis Alignment, Record High Breakdown Field (~10nm HZO), and Record Final 2Pr of 56 μC/cm2 with Endurance > 4E12. VLSI Technology and Circuits 2024: 1-2 - 2023
- [c4]Yu-Rui Chen, Yi-Chun Liu, Zefu Zhao, Wan-Hsuan Hsieh, Jia-Yang Lee, Chien-Te Tu, Bo-Wei Huang, Jer-Fu Wang, Shee-Jier Chueh, Yifan Xing, Guan-Hua Chen, Hung-Chun Chou, Dong Soo Woo, Min-Hung Lee, Chee Wee Liu:
First Stacked Nanosheet FeFET Featuring Memory Window of 1.8V at Record Low Write Voltage of 2V and Endurance >1E11 Cycles. VLSI Technology and Circuits 2023: 1-2 - [c3]Yi-Chun Liu, Yu-Rui Chen, Yun-Wen Chen, Hsin-Cheng Lin, Wan-Hsuan Hsieh, Chien-Te Tu, Bo-Wei Huang, Wei-Jen Chen, Chun-Yi Cheng, Shee-Jier Chueh, Chee Wee Liu:
Extremely High-κ Hf0.2Zr0.8O2 Gate Stacks Integrated into Ge0.95Si0.05 Nanowire and Nanosheet nFETs Featuring Respective Record Ion per Footprint of 9200μA/μm and Record Ion per Stack of 360μA at VOV=VDS=0.5V. VLSI Technology and Circuits 2023: 1-2 - [c2]Zefu Zhao, Yu-Rui Chen, Yun-Wen Chen, Wan-Hsuan Hsieh, Jer-Fu Wang, Jia-Yang Lee, Yifan Xing, Guan-Hua Chen, Chee Wee Liu:
Towards Epitaxial Ferroelectric HZO on n+-Si/Ge Substrates Achieving Record 2Pr = 84 μC/cm² and Endurance > 1E11. VLSI Technology and Circuits 2023: 1-2 - 2022
- [c1]Chung-En Tsai, Chun-Yi Cheng, Bo-Wei Huang, Hsin-Cheng Lin, Tao Chou, Chien-Te Tu, Yi-Chun Liu, Sun-Rong Jan, Yu-Rui Chen, Wan-Hsuan Hsieh, Kung-Ying Chiu, Shee-Jier Chueh, Chee Wee Liu:
Nearly Ideal Subthreshold Swing and Delay Reduction of Stacked Nanosheets Using Ultrathin Bodies. VLSI Technology and Circuits 2022: 401-402
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last updated on 2024-10-18 19:30 CEST by the dblp team
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