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2020 – today
- 2022
[c5]John J. Wuu, Rahul Agarwal, Michael Ciraula, Carl Dietz, Brett Johnson, Dave Johnson, Russell Schreiber, Raja Swaminathan, Will Walker, Samuel Naffziger:
3D V-Cache: the Implementation of a Hybrid-Bonded 64MB Stacked Cache for a 7nm x86-64 CPU. ISSCC 2022: 428-429
2010 – 2019
- 2011
- [c4]Tim C. Fischer, Srikanth Arekapudi, Eric Busta, Carl Dietz, Michael Golden, Scott Hilker, Aaron Horiuchi, Kevin A. Hurd, Dave Johnson, Hugh McIntyre, Samuel Naffziger, James Vinh, Jonathan White, Kathryn Wilcox:
Design solutions for the Bulldozer 32nm SOI 2-core processor module in an 8-core CPU. ISSCC 2011: 78-80
1990 – 1999
- 1994
- [j2]Sonya Gary, Pete Ippolito, Gianfranco Gerosa, Carl Dietz, Jim Eno, Hector Sanchez:
PowerPC 603, A Microprocessor for Portable Computers. IEEE Des. Test Comput. 11(4): 14-23 (1994) - [j1]Gianfranco Gerosa, Sonya Gary, Carl Dietz, Dac Pham, Kathy Hoover, Jose Alvarez, Hector Sanchez, Pete Ippolito, Tai Ngo, Suzanne Litch, Jim Eno, Jim Golab, Neil Vanderschaaf, Jim Kahle:
A 2.2 W, 80 MHz superscalar RISC microprocessor. IEEE J. Solid State Circuits 29(12): 1440-1454 (1994) - [c3]Sonya Gary, Carl Dietz, Jim Eno, Gianfranco Gerosa, Sung-Ho Park, Hector Sanchez:
The PowerPC 603 Microprocessor: A Low-Power Design for Portable Applications. COMPCON 1994: 307-315 - [c2]Ali Poursepanj, Deene Ogden, Brad Burgess, Sonya Gary, Carl Dietz, David Lee, S. Surya, Mike Peters:
The PowerPC 603 Microprocessor: Performance Analysis and Design Trade-offs. COMPCON 1994: 316-323 - [c1]Craig Hunter, Jeff Slaton, Jim Eno, Romesh M. Jessani, Carl Dietz:
The PowerPC 603TM Microprocessor: An Array Built-In Self-Test Mechanism. ITC 1994: 388-394
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