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2010 – 2019
- 2015
[c35]Robert Lajos Bücs, Luis Gabriel Murillo
, Ekaterina Korotcenko, Gaurav Dugge, Rainer Leupers, Gerd Ascheid, Andreas Ropers, Markus Wedler, Andreas Hoffmann:
Virtual hardware-in-the-loop co-simulation for multi-domain automotive systems via the functional mock-up interface. FDL 2015: 49-56- 2014
- [c34]Binghao Bao, Jörg Bormann, Markus Wedler, Dominik Stoffel, Wolfgang Kunz:
Coverage of compositional property sets under reactive constraints. ISQED 2014: 589-596 - 2013
- [j4]Bernard Schmidt, Carlos Villarraga, Thomas Fehmel, Jörg Bormann, Markus Wedler, Minh D. Nguyen, Dominik Stoffel, Wolfgang Kunz:
A New Formal Verification Approach for Hardware-dependent Embedded System Software. IPSJ Trans. Syst. LSI Des. Methodol. 6: 135-145 (2013) - [c33]Bernard Schmidt, Carlos Villarraga, Jörg Bormann, Dominik Stoffel, Markus Wedler, Wolfgang Kunz:
A computational model for SAT-based verification of hardware-dependent low-level embedded system software. ASP-DAC 2013: 711-716 - [c32]Oliver Marx, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Alexander Dreyer:
Proof logging for computer algebra based SMT solving. ICCAD 2013: 677-684 - [c31]Binghao Bao, Jörg Bormann, Markus Wedler, Dominik Stoffel, Wolfgang Kunz:
Compositional Completeness over reactive Constraints. MBMV 2013: 83-96 - [c30]Oliver Marx, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Alexander Dreyer:
Proof Logging for Computer Algebra based SMT Solving. MBMV 2013: 255-265 - 2012
- [c29]Joakim Urdahl, Dominik Stoffel, Markus Wedler, Wolfgang Kunz:
System verification of concurrent RTL modules by compositional path predicate abstraction. DAC 2012: 334-343 - [c28]Binghao Bao, Jörg Bormann, Markus Wedler, Dominik Stoffel, Wolfgang Kunz:
Formal Plausibility Checks for Environment Constraints. FDL (Selected Papers) 2012: 1-16 - [c27]Binghao Bao, Jörg Bormann, Markus Wedler, Dominik Stoffel, Wolfgang Kunz:
Formal plausibility checks for environment constraints. FDL 2012: 13-19 - 2011
- [c26]Minh D. Nguyen, Markus Wedler, Dominik Stoffel, Wolfgang Kunz:
Formal hardware/software co-verification by interval property checking with abstraction. DAC 2011: 510-515 - [c25]Evgeny Pavlenko, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Alexander Dreyer, Frank Seelisch, Gert-Martin Greuel:
STABLE: A new QF-BV SMT solver for hard verification problems combining Boolean reasoning with computer algebra. DATE 2011: 155-160 - [c24]Evgeny Pavlenko, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Alexander Dreyer, Frank Seelisch, Gert-Martin Greuel:
STABLE: A new QF-BV SMT Solver for hard Verification Problems combining Boolean Reasoning with Computer Algebra. MBMV 2011: 51-60 - [c23]Minh D. Nguyen, Markus Wedler, Bernard Schmidt, Dominik Stoffel, Wolfgang Kunz:
Formal Hardware/Software Co-Verification by Interval Property Checking with Abstraction. MBMV 2011: 61-70 - 2010
- [c22]Max Thalmaier, Minh D. Nguyen, Markus Wedler, Dominik Stoffel, Jörg Bormann, Wolfgang Kunz:
Analyzing k-step induction to compute invariants for SAT-based property checking. DAC 2010: 176-181 - [c21]Sacha Loitz, Markus Wedler, Dominik Stoffel, Christian Brehm, Norbert Wehn, Wolfgang Kunz:
Complete Verification of Weakly Programmable IPs against Their Operational ISA Model. FDL 2010: 29-36 - [c20]Joakim Urdahl, Dominik Stoffel, Jörg Bormann, Markus Wedler, Wolfgang Kunz:
Path predicate abstraction by complete interval property checking. FMCAD 2010: 207-215 - [c19]Max Thalmaier, Minh D. Nguyen, Markus Wedler, Dominik Stoffel, Wolfgang Kunz:
Analyzing k-step induction to compute invariants for SAT-based property checking. MBMV 2010: 87-96
2000 – 2009
- 2009
- [c18]Minh D. Nguyen, Max Thalmaier, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Jörg Bormann:
A re-use methodology for formal SoC protocol compliance verification. FDL 2009: 1-6 - [c17]Minh D. Nguyen, Max Thalmaier, Markus Wedler, Dominik Stoffel, Wolfgang Kunz:
A Re-Use Methodology for SoC Protocol Compliance Verification. MBMV 2009: 57-66 - [i1]Markus Wedler, Evgeny Pavlenko, Alexander Dreyer, Frank Seelisch, Dominik Stoffel, Gert-Martin Greuel, Wolfgang Kunz:
Solving hard instances in QF-BV combining Boolean reasoning with computer algebra. Algorithms and Applications for Next Generation SAT Solvers 2009 - 2008
- [j3]Minh D. Nguyen, Max Thalmaier, Markus Wedler, Jörg Bormann, Dominik Stoffel, Wolfgang Kunz:
Unbounded Protocol Compliance Verification Using Interval Property Checking With Invariants. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(11): 2068-2082 (2008) - [c16]Udo Krautz, Markus Wedler, Wolfgang Kunz, Kai Weber, Christian Jacobi, Matthias Pflanz:
Verifying full-custom multipliers by Boolean equivalence checking and an arithmetic bit level proof. ASP-DAC 2008: 398-403 - [c15]Oliver Wienand, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Gert-Martin Greuel:
An Algebraic Approach for Proving Data Correctness in Arithmetic Data Paths. CAV 2008: 473-486 - [c14]Evgeny Pavlenko, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Oliver Wienand, Evgeny Karibaev:
Modeling of Custom-Designed Arithmetic Components for ABL Normalization. FDL 2008: 124-129 - [c13]Evgeny Pavlenko, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Oliver Wienand, Evgeny Karibaev:
A New Verification Technique for Custom-Designed Components at the Arithmetic Bit Level. FDL (Selected Papers) 2008: 257-272 - [c12]Evgeny Pavlenko, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Oliver Wienand, Evgeny Karibaev:
Modeling of Custom-Designed Arithmetic Components for ABL Normalization. MBMV 2008: 51-60 - [c11]Bernard Schmidt, Slava Bulach, Katharina Weinberger, Markus Wedler:
Formale Verifikation einer Hardware-Implementierung des LIN-Protokoll Kontrollers. MBMV 2008: 61-70 - [c10]Sacha Loitz, Markus Wedler, Christian Brehm, Timo Vogt, Norbert Wehn, Wolfgang Kunz:
Proving Functional Correctness of Weakly Programmable IPs - A Case Study with Formal Property Checking. SASP 2008: 48-54 - 2007
- [j2]Markus Wedler, Dominik Stoffel, Raik Brinkmann, Wolfgang Kunz:
A Normalization Method for Arithmetic Data-Path Verification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(11): 1909-1922 (2007) - [c9]Evgeny Pavlenko, Markus Wedler, Dominik Stoffel, Wolfgang Kunz:
Arithmetic Constraints in SAT-based Property Checking. MBMV 2007: 91-100 - 2006
- [c8]Alexander Jesser, Markus Wedler, Lars Hedrich, Wolfgang Kunz:
A case study on applying bounded model checking to analog circuit verification. MBMV 2006: 106-113 - 2005
- [c7]Markus Wedler, Dominik Stoffel, Wolfgang Kunz:
Normalization at the arithmetic bit level. DAC 2005: 457-462 - [c6]Minh D. Nguyen, Dominik Stoffel, Markus Wedler, Wolfgang Kunz:
Transition-by-transition FSM traversal for reachability analysis in bounded model checking. ICCAD 2005: 1068-1075 - 2004
- [j1]Dominik Stoffel, Markus Wedler, Peter Warkentin, Wolfgang Kunz:
Structural FSM traversal. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(5): 598-619 (2004) - [c5]Markus Wedler, Dominik Stoffel, Wolfgang Kunz:
Exploiting state encoding for invariant generation in induction-based property checking. ASP-DAC 2004: 424-429 - [c4]Markus Wedler, Dominik Stoffel, Wolfgang Kunz:
Arithmetic Reasoning in DPLL-Based SAT Solving. DATE 2004: 30-35 - 2003
- [c3]Markus Wedler, Dominik Stoffel, Wolfgang Kunz:
Using RTL Statespace Information and State Encoding for Induction Based Property Checking. DATE 2003: 11156-11157 - [c2]Markus Wedler, Dominik Stoffel, Wolfgang Kunz:
Towards the impact of state encoding on induction-based property checking. MBMV 2003: 199-208 - 2002
- [c1]Markus Wedler, Dominik Stoffel, Wolfgang Kunz:
Improving Structural FSM Traversal by Constraint-Satisfying Logic Simulation. ISVLSI 2002: 151-158
Coauthor Index
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