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Mario Alfredo Reyes-Barranca
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2020 – today
- 2022
- [c29]I. S. Chong-Cervantes, Álvaro Anzueto-Ríos, Jose A. Moreno-Cadenas, Mario Alfredo Reyes-Barranca, Luis M. Flores-Nava:
Eye Fundus Image Processing Using Fuzzy Logic. CCE 2022: 1-6 - 2021
- [c28]Andrea López-Tapia, Luis Sánchez-Márquez, Mario Alfredo Reyes-Barranca, Griselda Stephany Abarca-Jimenez, Luis Martín Flores-Nava:
Micromotors unit based on CMOS-MEMS technology integrated on a single chip. CCE 2021: 1-6 - 2020
- [j3]Alejandro Medina-Santiago, Patricia E. Vera Molina, Mario Alfredo Reyes-Barranca, José Ángel Zepeda-Hernández:
Digital System Design Using Standard NeuMOS Cells Applied in ADAS. Circuits Syst. Signal Process. 39(7): 3574-3594 (2020) - [c27]Benito Granados-Rojas, Mario Alfredo Reyes-Barranca, Luis Martín Flores-Nava, Griselda Stephany Abarca-Jimenez, Miguel Ángel Aleman-Arce, Yesenia Eleonor González-Navarro:
On Balanced Tradeoffs between Stiffness and Design Area in CMOS-MEMS Accelerometer Springs. CCE 2020: 1-4 - [c26]Andrea López-Tapia, Mario Alfredo Reyes-Barranca, Griselda Stephany Abarca-Jimenez, Luis Sánchez-Márquez, Luis Martín Flores-Nava:
Design of position sensor of a linear micromotor based on CMOS-MEMS technology. CCE 2020: 1-6 - [c25]J. J. Morales-Romero, Mario Alfredo Reyes-Barranca, Luis Martín Flores-Nava, E. R. Espinosa-García:
Proposal for training a Cellular Neural Network using a Hybrid Artificial Bee Colony and Nelder-Mead Algorithms. CCE 2020: 1-6 - [c24]Luis Sánchez-Márquez, Mario Alfredo Reyes-Barranca, Griselda Stephany Abarca-Jimenez, Andrea López-Tapia, Luis Martín Flores-Nava:
Proposal for a rotary micromotor structure based on CMOS-MEMS technology. CCE 2020: 1-6
2010 – 2019
- 2019
- [j2]Alejandro Medina-Santiago, Mario Alfredo Reyes-Barranca, Ignacio Algredo-Badillo, Alfonso Martinez Cruz, Kelsey A. Ramírez-Gutiérrez, Eleazar Adrián Cortés-Barrón:
Reconfigurable arithmetic logic unit designed with threshold logic gates. IET Circuits Devices Syst. 13(1): 21-30 (2019) - [c23]Benito Granados-Rojas, Mario Alfredo Reyes-Barranca, Luis Martín Flores-Nava, Griselda Stephany Abarca-Jimenez, Miguel Ángel Aleman-Arce, Yesenia Eleonor González-Navarro:
Composition of Metal Layers in CMOS-MEMS Micromachining Process. CCE 2019: 1-4 - [c22]Andrea López-Tapia, Mario Alfredo Reyes-Barranca, Griselda Stephany Abarca-Jimenez, Luis Sánchez-Márquez, Luis Martín Flores-Nava, Oliverio Arellano-Cárdenas:
Design and analysis of the mechanical structure of a linear micromotor based on CMOS-MEMS technology. CCE 2019: 1-6 - [c21]J. J. Morales-Romero, Mario Alfredo Reyes-Barranca, Luis M. Flores-Nava:
Improved Algorithm for Time-Multiplexing with Digital CNN's Applied in Image Processing, Synthesized in a FPGA. CCE 2019: 1-6 - [c20]Luis Sánchez-Márquez, Mario Alfredo Reyes-Barranca, Griselda Stephany Abarca-Jimenez, Andrea López-Tapia, Luis Martín Flores-Nava, Oliverio Arellano-Cárdenas:
Proposal of a speed sensor based on FGMOS for a MEMS rotatory micromotor. CCE 2019: 1-6 - 2018
- [c19]Benito Granados-Rojas, Mario Alfredo Reyes-Barranca, Luis Martín Flores-Nava, Griselda Stephany Abarca-Jimenez, Salvador Mendoza-Acevedo, Yesenia Eleonor González-Navarro:
Application and Resulting Suitability of a Genetic Algorithm in the Design of FGMOS-based CMOS-MEMS Transducers. CCE 2018: 1-5 - 2017
- [c18]Benito Granados-Rojas, Mario Alfredo Reyes-Barranca, Luis Martín Flores-Nava, Griselda Stephany Abarca-Jimenez, Yesenia Eleonor González-Navarro:
Basic readout circuit applied on FGMOS-based CMOS-MEMS inertial sensing prototypes. CCE 2017: 1-6 - [c17]J. J. Morales-Romero, Felipe Gomez-Castañeda, Jose A. Moreno-Cadenas, Mario Alfredo Reyes-Barranca, Luis M. Flores-Nava:
Time-multiplexing cellular neural network in FPGA for image processing. CCE 2017: 1-5 - 2016
- [c16]S. Dominguez-Sanchez, Salvador Mendoza-Acevedo, Mario Alfredo Reyes-Barranca, Luis M. Flores-Nava, Jose A. Moreno-Cadenas:
Assessment of the possibility to couple a photo sensor to a Floating-gate MOS transistor. CCE 2016: 1-5 - [c15]Benito Granados-Rojas, Mario Alfredo Reyes-Barranca, G. S. Abarca-Jimenez, Luis M. Flores-Nava, Jose A. Moreno-Cadenas:
3-layered capacitive structure design for MEMS inertial sensing. CCE 2016: 1-5 - 2015
- [c14]Benito Granados-Rojas, Mario Alfredo Reyes-Barranca, Luis M. Flores-Nava, Jose A. Moreno-Cadenas:
Design of a CMOS-based RF-MEMS switch as an alternative charge/discharge mechanism for quasi floating-gate MOS transistors. CCE 2015: 1-6 - 2014
- [c13]G. S. Abarca-Jimenez, Mario Alfredo Reyes-Barranca, Salvador Mendoza-Acevedo, J. E. Munguia-Cervantes, Miguel Ángel Aleman-Arce:
Modal analysis of a structure used as a capacitive MEMS accelerometer sensor. CCE 2014: 1-4 - [c12]S. Dominguez-Sanchez, Mario Alfredo Reyes-Barranca, G. S. Abarca-Jimenez, Salvador Mendoza-Acevedo:
A prototype design for an accelerometer using a multiple floating-gate MOSFET as a transducer. CCE 2014: 1-6 - [c11]Luis A. Gordillo, Alejandro Medina-Santiago, José Ángel Zepeda-Hernández, Héctor-Ricardo Hernandez-de Leon, Mario Alfredo Reyes-Barranca:
An adaptive geometrically-complemented approach for ECG signal denoising. CCE 2014: 1-6 - 2013
- [c10]G. S. Abarca-Jimenez, Mario Alfredo Reyes-Barranca, Salvador Mendoza-Acevedo:
MEMS capacitive sensor using FGMOS. CCE 2013: 421-426 - 2012
- [c9]Eleazar Adrián Cortés-Barrón, Mario Alfredo Reyes-Barranca, Luis M. Flores-Nava, Alejandro Medina-Santiago:
4-Bit Arithmetic Logic Unit (ALU) based on Neuron MOS Transistors. CCE 2012: 1-6 - [c8]Edgar Norman Vázquez-Acosta, Mario Alfredo Reyes-Barranca, Salvador Mendoza-Acevedo, José Luis González-Vidal:
Simplified adjusting and simulation of a pseudo Gaussian function in voltage domain generated with FGMOS transistors on circuit simulation software exportable to a multi-domain platform. CCE 2012: 1-6 - 2011
- [c7]Gelacio Castillo-Cabrera, Mario Alfredo Reyes-Barranca, Jair García Lamont, Jose Antonio Moreno-Cadenas, Luis Martín Flores-Nava:
Electronic architecture for an analog retinal processing prototype suitable to be implemented on standard CMOS technology. CCE 2011: 1-6 - [c6]Salvador Mendoza-Acevedo, Mario Alfredo Reyes-Barranca:
Study for the micromachining optimization of micro hotplates used in MEMS-CMOS gas sensors. CCE 2011: 1-6 - 2010
- [j1]Mario Alfredo Reyes-Barranca, Salvador Mendoza-Acevedo, Luis M. Flores-Nava, Alejandro Ávila-García, Edgar Norman Vázquez-Acosta, Jose Antonio Moreno-Cadenas, Gaspar Casados-Cruz:
Using a Floating-Gate MOS Transistor as a Transducer in a MEMS Gas Sensing System. Sensors 10(11): 10413-10434 (2010) - [c5]Salvador Mendoza-Acevedo, Mario Alfredo Reyes-Barranca, Edgar Norman Vázquez-Acosta, Luis M. Flores-Nava, Alejandro Ávila-García:
Micro-hot plate temperature control circuit design for a MEMS gas sensor, by interfacing multiphysics and multidomain software. CCE 2010: 519-524 - [c4]Edgar Norman Vázquez-Acosta, Mario Alfredo Reyes-Barranca, Salvador Mendoza-Acevedo, José Luis González-Vidal:
Simplified modeling and simulation for physical systems circuit design on a multiphysics software exportable to a multi-domain platform. CCE 2010: 525-530 - [c3]Gelacio Castillo-Cabrera, Jair García Lamont, Mario Alfredo Reyes-Barranca, Jose Antonio Moreno-Cadenas, A. Escobosa-Echavarria:
Optical characterization of integrated P+/N-Well/P-substrate and N-Well/P-substrate photo-device structures on CMOS technology. CCE 2010: 550-555
2000 – 2009
- 2009
- [c2]Mario Alfredo Reyes-Barranca, Salvador Mendoza-Acevedo, Alejandro Ávila-García, José Luis González-Vidal, Luis M. Flores-Nava:
Floating gate MOSFET circuit design for a monolithic MEMS GAS sensor. SBCCI 2009 - 2001
- [c1]Felipe Gomez-Castañeda, Jose A. Moreno-Cadenas, Luis M. Flores-Nava, Mario Alfredo Reyes-Barranca:
Electronic Prototype for Fuzzy C-Means Clustering: Analog Building Blocks. FUZZ-IEEE 2001: 1047-1049
Coauthor Index
aka: Griselda Stephany Abarca-Jimenez
aka: Luis Martín Flores-Nava
aka: Jose Antonio Moreno-Cadenas
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last updated on 2024-10-07 21:19 CEST by the dblp team
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