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2020 – today
- 2024
[j9]Enkele Rama
, Mouadh Ayache, Rainer Buchty, Bernhard Bauer, Matthias Korb, Mladen Berekovic, Saleh Mulhem:
Trustworthy Integrated Circuits: From Safety to Security and Beyond. IEEE Access 12: 69603-69632 (2024)- [j8]Saleh Mulhem, Felix Muuss, Christian Ewert, Rainer Buchty, Mladen Berekovic:
ML-Based Trojan Classification: Repercussions of Toxic Boundary Nets. IEEE Embed. Syst. Lett. 16(3): 251-254 (2024) - [c36]Wadid Foudhaili, Anouar Nechi, Celine Thermann, Mohammad Al Johmani, Rainer Buchty, Mladen Berekovic, Saleh Mulhem:
Reconfigurable Edge Hardware for Intelligent IDS: Systematic Approach. ARC 2024: 48-62 - [c35]Jihene Bouhlila, Felix Last, Rainer Buchty, Mladen Berekovic, Saleh Mulhem:
Machine Learning for SRAM Stability Analysis. ISCAS 2024: 1-5 - [i4]Wadid Foudhaili, Anouar Nechi, Celine Thermann, Mohammad Al Johmani, Rainer Buchty, Mladen Berekovic, Saleh Mulhem:
Reconfigurable Edge Hardware for Intelligent IDS: Systematic Approach. CoRR abs/2404.10792 (2024) - [i3]Saleh Mulhem, Christian Ewert, Andrija Neskovic, Amrit Sharma Poudel, Christoph Hübner, Mladen Berekovic, Rainer Buchty:
Secure Software/Hardware Hybrid In-Field Testing for System-on-Chip. CoRR abs/2410.05109 (2024) - 2023
- [j7]Anouar Nechi, Lukas Groth, Saleh Mulhem, Farhad Merchant, Rainer Buchty, Mladen Berekovic:
FPGA-based Deep Learning Inference Accelerators: Where Are We Standing? ACM Trans. Reconfigurable Technol. Syst. 16(4): 60:1-60:32 (2023) - [c34]Andrija Neskovic, Saleh Mulhem, Alexander Treff, Rainer Buchty, Thomas Eisenbarth, Mladen Berekovic:
SystemC Model of Power Side-Channel Attacks Against AI Accelerators: Superstition or not? ICCAD 2023: 1-8 - [i2]Andrija Neskovic, Saleh Mulhem, Alexander Treff, Rainer Buchty, Thomas Eisenbarth, Mladen Berekovic:
SystemC Model of Power Side-Channel Attacks Against AI Accelerators: Superstition or not? CoRR abs/2311.13387 (2023) - 2022
- [j6]Bernhard Bauer, Mouadh Ayache, Saleh Mulhem, Meirav Nitzan, Jyotika Athavale, Rainer Buchty, Mladen Berekovic:
On the Dependability Lifecycle of Electrical/Electronic Product Development: The Dual-Cone V-Model. Computer 55(9): 99-106 (2022) - [c33]Christopher Blochwitz, Philipp Grothe, Sven Dreier, Waiel Aljnabi, Rainer Buchty, Mladen Berekovic:
RemEduLa - Remote Education Laboratory for FPGA Design Technology. ISCAS 2022: 1773-1777
2010 – 2019
- 2018
- [e1]Mladen Berekovic, Rainer Buchty, Heiko Hamann, Dirk Koch, Thilo Pionteck:
Architecture of Computing Systems - ARCS 2018 - 31st International Conference, Braunschweig, Germany, April 9-12, 2018, Proceedings. Lecture Notes in Computer Science 10793, Springer 2018, ISBN 978-3-319-77609-5 [contents] - 2017
- [c32]Patrick Siegl, Rainer Buchty, Mladen Berekovic:
A bandwidth accurate, flexible and rapid simulating multi-HMC modeling tool. MEMSYS 2017: 71-82 - 2016
- [j5]Rolf Meyer, Jan Wagner, Bastian Farkas, Sven Alexander Horsinka, Patrick Siegl, Rainer Buchty, Mladen Berekovic:
A Scriptable Standard-Compliant Reporting and Logging Framework for SystemC. ACM Trans. Embed. Comput. Syst. 16(1): 6:1-6:28 (2016) - [c31]Patrick Siegl, Rainer Buchty, Mladen Berekovic:
Towards bridging the gap between academic and industrial heterogeneous system architecture design space exploration. RAPIDO@HiPEAC 2016: 4:1-4:6 - [c30]Patrick Siegl, Rainer Buchty, Mladen Berekovic:
Data-Centric Computing Frontiers: A Survey On Processing-In-Memory. MEMSYS 2016: 295-308 - 2015
- [c29]Patrick Siegl, Rainer Buchty, Mladen Berekovic:
Revealing Potential Performance Improvements by Utilizing Hybrid Work-Sharing for Resource-Intensive Seismic Applications. PDP 2015: 659-663 - [c28]Jan Wagner, Rolf Meyer, Rainer Buchty, Mladen Berekovic:
A scriptable, standards-compliant reporting and logging extension for SystemC. SAMOS 2015: 366-371 - 2014
- [c27]Sven Alexander Horsinka, Rolf Meyer, Jan Wagner, Rainer Buchty, Mladen Berekovic:
On RTL to TLM Abstraction to Benefit Simulation Performance and Modeling Productivity in NoC Design Exploration. NoCArc@MICRO 2014: 39-44 - [c26]Thomas Schuster, Rolf Meyer, Rainer Buchty, Luca Fossati, Mladen Berekovic:
SoCRocket - A virtual platform for the European Space Agency's SoC development. ReCoSoC 2014: 1-7 - 2013
- [c25]Boris Motruk, Jonas Diemer, Rainer Buchty, Mladen Berekovic:
Power Monitoring for Mixed-Criticality on a Many-Core Platform. ARCS 2013: 13-24 - [c24]Hayder Al-Khalissi, Rainer Buchty, Mladen Berekovic:
Efficient Barrier Synchronization for OpenMP-Like Parallelism on the Intel SCC. ICPADS 2013: 10-17 - [c23]Boris Motruk, Jonas Diemer, Philip Axer, Rainer Buchty, Mladen Berekovic:
Safe Virtual Interrupts Leveraging Distributed Shared Resources and Core-to-Core Communication on Many-Core Platforms. PRDC 2013: 293-302 - [c22]Jan Wagner, Rainer Buchty, Christian Schubert, Mladen Berekovic:
Designing a low-power wireless sensor node rASIP architecture. SiPS 2013: 106-111 - 2012
- [j4]Rainer Buchty, Vincent Heuveline, Wolfgang Karl, Jan-Philipp Weiss:
A survey on hardware-aware and heterogeneous computing on multicore processors and accelerators. Concurr. Comput. Pract. Exp. 24(7): 663-675 (2012) - [j3]Mario Kicherer, Fabian Nowak, Rainer Buchty, Wolfgang Karl:
Seamlessly portable applications: Managing the diversity of modern heterogeneous systems. ACM Trans. Archit. Code Optim. 8(4): 42:1-42:20 (2012) - [c21]Boris Motruk, Jonas Diemer, Rainer Buchty, Rolf Ernst, Mladen Berekovic:
IDAMC: A Many-Core Platform with Run-Time Monitoring for Mixed-Criticality. HASE 2012: 24-31 - 2011
- [c20]David Kramer, Rainer Buchty, Wolfgang Karl:
A Light-Weight Approach for Online State Classification of Self-organizing Parallel Systems. ARCS 2011: 183-194 - [c19]Mario Kicherer, Rainer Buchty, Wolfgang Karl:
Cost-aware function migration in heterogeneous systems. HiPEAC 2011: 137-145 - [p1]David Kramer, Rainer Buchty, Wolfgang Karl:
Monitoring and Self-awareness for Heterogeneous, Adaptive Computing Systems. Organic Computing 2011: 163-177 - 2010
- [c18]Fabian Nowak, Mario Kicherer, Rainer Buchty, Wolfgang Karl:
Delivering Guidance Information in Heterogeneous Systems. ARCS Workshops 2010: 95-102 - [c17]Fabian Nowak, Rainer Buchty:
A Tightly Coupled Accelerator Infrastructure for Exact Arithmetics. ARCS 2010: 222-233 - [c16]Mario Kicherer, Fabian Nowak, Rainer Buchty, Wolfgang Karl:
Extending a Light-weight Runtime System by Dynamic Instrumentation for Performance Evaluation. ARCS Workshops 2010: 279-284
2000 – 2009
- 2009
- [c15]Rainer Buchty, David Kramer, Fabian Nowak, Wolfgang Karl:
A Seamless Virtualization Approach for Transparent Dynamical Function Mapping Targeting Heterogeneous and Reconfigurable Systems. ARC 2009: 362-367 - [c14]Rainer Buchty, David Kramer, Mario Kicherer, Wolfgang Karl:
A Light-Weight Approach to Dynamical Runtime Linking Supporting Heterogenous, Parallel, and Reconfigurable Architectures. ARCS 2009: 60-71 - [c13]Rainer Buchty, Mario Kicherer, David Kramer, Wolfgang Karl:
An Embrace-and-Extend Approach to Managing the Complexity of Future Heterogeneous Systems. SAMOS 2009: 227-236 - 2008
- [j2]Jie Tao, Marcel Kunze, Fabian Nowak, Rainer Buchty, Wolfgang Karl:
Performance Advantage of Reconfigurable Cache Design on Multicore Processor Systems. Int. J. Parallel Program. 36(3): 347-360 (2008) - [j1]Rainer Buchty, Wolfgang Karl:
Design Aspects of Self-Organizing Heterogeneous Multi-Core Architectures (Entwurfsaspekte selbstorganisierender, heterogener Multicore-Architekturen). it Inf. Technol. 50(5): 293-299 (2008) - [c12]Fabian Nowak, Rainer Buchty, Wolfgang Karl:
Adaptive Cache Infrastructure: Supporting Dynamic Program Changes following Dynamic Program Behavior. PASA 2008: 59-68 - [c11]Rainer Buchty, Oliver Mattes, Wolfgang Karl:
Self-aware Memory: Managing Distributed Memory in an Autonomous Multi-master Environment. ARCS 2008: 98-113 - [c10]Rainer Buchty, David Kramer, Wolfgang Karl:
An Organic Computing Approach to Sustained Real-time Monitoring. BICC 2008: 151-162 - 2007
- [c9]Jie Tao, Asadollah Shahbahrami, Ben H. H. Juurlink, Rainer Buchty, Wolfgang Karl, Stamatis Vassiliadis:
Optimizing Cache Performance of the Discrete Wavelet Transform Using a Visualization Tool. ISM 2007: 153-160 - [c8]Fabian Nowak, Rainer Buchty, Wolfgang Karl:
A Run-time Reconfigurable Cache Architecture. PARCO 2007: 757-766 - 2006
- [c7]Hans-Peter Löb, Rainer Buchty, Wolfgang Karl:
A network agent for diagnosis and analysis of real-time Ethernet networks. CASES 2006: 65-73 - [c6]Rainer Buchty, Jie Tao, Wolfgang Karl:
Automatic Data Locality Optimization Through Self-optimization. IWSOS/EuroNGI 2006: 187-201 - [c5]Rainer Buchty:
A Monitoring Infrastructure for the Digital on-demand Computing Organism (DodOrg). IWSOS/EuroNGI 2006: 258 - [i1]Rainer Buchty:
Reconfigurable Architectures and Instruction Sets: Programmability, Code Generation, and Program Execution. Dynamically Reconfigurable Architectures 2006 - 2005
- [c4]Georg Acher, Rainer Buchty, Carsten Trinitis:
CPU-independent Assembler in an FPGA. FPL 2005: 519-522 - 2004
- [c3]Rainer Buchty, Nevin Heintze, Dino Oliva:
Cryptonite - A Programmable Crypto Processor Architecture for High-Bandwidth Applications. ARCS 2004: 184-198 - [c2]Rainer Buchty:
Modelling Cryptonite - On the Design of a Programmable High-Performance Crypto Processor. ARCS Workshops 2004: 319-327 - 2003
- [c1]Dino Oliva, Rainer Buchty, Nevin Heintze:
AES and the cryptonite crypto processor. CASES 2003: 198-209 - 2002
- [b1]Rainer Buchty:
Cryptonite: a programmable crypto processor architecture for high bandwidth applications. Technical University Munich, Germany, 2002, pp. 1-184
Coauthor Index
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last updated on 2024-11-13 23:53 CET by the dblp team
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