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2020 – today
- 2024
[j8]Sundeep Javvaji
, Muhammed Bolatkale, Shagun Bajoria, Robert Rutten, Bert Oude-Essink, Koen Beijens, Kofi A. A. Makinwa, Lucien J. Breems:
A 120-MHz BW, 122-dBFS SFDR CTΔΣ ADC With a Multi-Path Multi-Frequency Chopping Scheme. IEEE J. Solid State Circuits 59(4): 1184-1193 (2024)- 2023
- [c17]Sundeep Javvaji, Muhammed Bolatkale, Shagun Bajoria, Robert Rutten, Bert Oude-Essink, Koen Beijens, Kofi A. A. Makinwa, Lucien J. Breems:
A 6GHz Multi-Path Multi-Frequency Chopping CTΔΣ Modulator achieving 122dBFS SFDR from 150kHz to 120MHz BW. VLSI Technology and Circuits 2023: 1-2 - 2022
- [j7]Muhammed Bolatkale, Robert Rutten, Hans Brekelmans, Shagun Bajoria, Yihan Gao, Bernard Burdiek, Lucien J. Breems:
A 28-nm 6-GHz 2-bit Continuous-Time ΔΣ ADC With -101-dBc THD and 120-MHz Bandwidth Using Blind Digital DAC Error Correction. IEEE J. Solid State Circuits 57(12): 3768-3780 (2022) - [j6]Qilong Liu, Lucien J. Breems, Shagun Bajoria, Muhammed Bolatkale, Robert Rutten, Georgi I. Radulov:
A 158-mW 360-MHz BW 68-dB DR Continuous-Time 1-1-1 Filtering MASH ADC in 40-nm CMOS. IEEE J. Solid State Circuits 57(12): 3781-3793 (2022) - [c16]Pierluigi Cenci, Hans Brekelmans, Shagun Bajoria, Marcello Ganzerli, Bernard Burdiek, Robert Rutten, Yihan Gao, Muhammed Bolatkale, Paul Swinkels, Lucien J. Breems:
A 2GHz 2-bit Continuous-Time Delta Sigma ADC with 2GHz chopper achieving 12nV/sqrt(Hz) 1/f noise at 153kHz and -104.7dBc THD in 30MHz BW. ESSCIRC 2022: 321-324 - [c15]Qilong Liu, Lucien J. Breems, Chenming Zhang, Shagun Bajoria, Muhammed Bolatkale, Robert Rutten, Georgi I. Radulov:
A 5GS/s 360MHz-BW 68dB-DR Continuous-Time 1-1-1 Filtering MASH ΔΣ ADC in 40nm CMOS. ISSCC 2022: 414-416 - [c14]Muhammed Bolatkale, Robert Rutten, Hans Brekelmans, Shagun Bajoria, Yihan Gao, Bernard Burdiek, Lucien J. Breems:
A 28nm 6GHz 2b Continuous-Time ΔΣ ADC with -101 dBc THD and 120MHz Bandwidth Using Digital DAC Error Correction. ISSCC 2022: 416-418 - 2021
- [c13]Chenming Zhang, Lucien J. Breems, Qilong Liu, Georgi I. Radulov, Muhammed Bolatkale, Shagun Bajoria, Robert Rutten, Arthur H. M. van Roermund:
A 6GS/s 0.5GHz BW continuous-time 2-1-1 MASH ΔΣ modulator with phase-boosted current-mode ELD compensation in 40nm CMOS. ESSCIRC 2021: 491-494
2010 – 2019
- 2019
- [c12]Pierluigi Cenci, Muhammed Bolatkale, Robert Rutten, M. Ganzerli, Gerard Lassche, Kofi A. A. Makinwa, Lucien J. Breems:
A 3.2mW SAR-assisted CTΔ∑ ADC with 77.5dB SNDR and 40MHz BW in 28nm CMOS. VLSI Circuits 2019: 230- - 2017
- [c11]Pierluigi Cenci, Muhammed Bolatkale, Robert Rutten, Gerard Lassche, Kofi A. A. Makinwa, Lucien J. Breems:
A 28 nm 2 GS/s 5-b single-channel SAR ADC with gm-boosted StrongARM comparator. ESSCIRC 2017: 171-174 - 2016
- [j5]Lucien J. Breems, Muhammed Bolatkale, Hans Brekelmans, Shagun Bajoria, Jan Niehof, Robert Rutten, Bert Oude-Essink, Franco Fritschij, Jagdip Singh, Gerard Lassche:
A 2.2 GHz Continuous-Time ΔΣ ADC With -102 dBc THD and 25 MHz Bandwidth. IEEE J. Solid State Circuits 51(12): 2906-2916 (2016) - [c10]Lucien J. Breems, Muhammed Bolatkale, Hans Brekelmans, Shagun Bajoria, Jan Niehof, Robert Rutten, Bert Oude-Essink, Franco Fritschij, Jagdip Singh, Gerard Lassche:
15.2 A 2.2GHz continuous-time ΔΣ ADC with -102dBc THD and 25MHz BW. ISSCC 2016: 272-273 - 2015
- [j4]Yanxiang Huang, Ajay Kapoor, Robert Rutten, José Pineda de Gyvez:
A 13 bits 4.096 GHz 45 nm CMOS digital decimation filter chain with Carry-Save format numbers. Microprocess. Microsystems 39(8): 869-878 (2015) - 2013
- [c9]Jan van Sinderen, Gerben W. de Jong, Frank Leong, Xin He, Melina Apostolidou, Harish Kundur Subramaniyan, Robert Rutten, Jan Niehof, Jos Verlinden, Hao Wang, Anton Hoogstraate, Ka Chun Kwok, Rene Verlinden, Reinier Hoogendoorn, Dennis Jeurissen, Anton Salfelner, Ewald Bergler, Javier M. Velandia Torres, Christopher J. Haji-Michael, Thomas Unterweger, Esa Tarvainen, Martin Posch, Reinhold Schmidt, Markus Stattmann, Jacek Tyminski, Patrick Jean, Sébastien Darfeuille, Olivier Aymard, Alexis le Grontec, Claire Boucey, Christophe Kelma, Guillaume Monnerie:
Wideband UHF ISM-band transceiver supporting multichannel reception and DSSS modulation. ISSCC 2013: 454-455 - [c8]Yanxiang Huang, Ajay Kapoor, Robert Rutten, José Pineda de Gyvez:
A 13 bits 4.096 GHz 45 nm CMOS digital decimation filter chain using Carry-Save format numbers. NORCHIP 2013: 1-4 - 2012
- [c7]Frank Leong, Robert Rutten, Nenad Pavlovic, Amine Mounaim:
A 6.5 GHz Arbitrary Digital Waveform Generator. ESSCIRC 2012: 482-485 - 2011
- [j3]Muhammed Bolatkale, Lucien J. Breems, Robert Rutten, Kofi A. A. Makinwa:
A 4 GHz Continuous-Time ΔΣ ADC With 70 dB DR and -74 dBFS THD in 125 MHz BW. IEEE J. Solid State Circuits 46(12): 2857-2868 (2011) - [c6]Muhammed Bolatkale, Lucien J. Breems, Robert Rutten, Kofi A. A. Makinwa:
A 4GHz CT ΔΣ ADC with 70dB DR and -74dBFS THD in 125MHz BW. ISSCC 2011: 470-472 - 2010
- [c5]Xin He, Jan van Sinderen, Robert Rutten:
A 45nm WCDMA transmitter using direct quadrature voltage modulator with high oversampling digital front-end. ISSCC 2010: 62-63
2000 – 2009
- 2008
- [c4]Robert Rutten, Lucien J. Breems, Robert H. M. van Veldhoven:
Digital jitter-cancellation for narrowband signals. ISCAS 2008: 1444-1447 - [c3]Robert H. M. van Veldhoven, Robert Rutten, Lucien J. Breems:
An Inverter-Based Hybrid ΔΣ Modulator. ISSCC 2008: 492-493 - 2007
- [j2]Lucien J. Breems, Robert Rutten, Robert H. M. van Veldhoven, Gerard van der Weide:
A 56 mW Continuous-Time Quadrature Cascaded ΣΔ Modulator With 77 dB DR in a Near Zero-IF 20 MHz Band. IEEE J. Solid State Circuits 42(12): 2696-2705 (2007) - [c2]Lucien J. Breems, Robert Rutten, Robert H. M. van Veldhoven, Gerard van der Weide, Henk A. H. Termeer:
A 56mW CT Quadrature Cascaded ΣΔ Modulator with 77dB DR in a Near Zero-IF 20MHz Band. ISSCC 2007: 238-599 - 2006
- [c1]Lucien J. Breems, Robert H. M. van Veldhoven, Kathleen Philips, Robert Rutten, Gunnar Wetzker:
Continuous-time Sigma-Delta Modulators for Highly Digitised Receivers. ICECS 2006: 41-45 - 2004
- [j1]Lucien J. Breems, Robert Rutten, Gunnar Wetzker:
A cascaded continuous-time ΣΔ Modulator with 67-dB dynamic range in 10-MHz bandwidth. IEEE J. Solid State Circuits 39(12): 2152-2160 (2004)
Coauthor Index
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