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Christian Pacha
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2010 – 2019
- 2016
- [c18]Juergen Alt, Paolo Bernardi, Alberto Bosio, Riccardo Cantoro, Hans G. Kerkhoff, Andreas Leininger, Wolfgang Molzer, Alessandro Motta, Christian Pacha, Alberto Pagani, Alireza Rohani, R. Strasser:
Thermal issues in test: An overview of the significant aspects and industrial practice. VTS 2016: 1-4
2000 – 2009
- 2009
- [c17]Thomas Baumann, Doris Schmitt-Landsiedel, Christian Pacha:
Architectural assessment of design techniques to improve speed and robustness in embedded microprocessors. DAC 2009: 947-950 - 2007
- [j7]Thomas Lüftner, Jörg Berthold, Christian Pacha, Georg Georgakos, Guillaume Sauzon, Olaf Hömke, Jurij Beshenar, Peter Mahrla, Knut M. Just, Peter Hober, Stephan Henzler, Doris Schmitt-Landsiedel, Andre Yakovleff, Axel Klein, Richard J. Knight, Pramod Acharya, Andre Bonnardot, Steffen Buch, Matthias Sauer:
A 90-nm CMOS Low-Power GSM/EDGE Multimedia-Enhanced Baseband Processor With 380-MHz ARM926 Core and Mixed-Signal Extensions. IEEE J. Solid State Circuits 42(1): 134-144 (2007) - [c16]Christian Pacha, Klaus von Arnim, Florian Bauer, Thomas Schulz, Wade Xiong, K. T. San, Andrew Marshall, Thomas Baumann, C. Rinn Cleavelin, Klaus Schruefer, Jörg Berthold:
Efficiency of low-power design techniques in Multi-Gate FET CMOS Circuits. ESSCIRC 2007: 111-114 - [c15]Thomas Baumann, Jörg Berthold, T. Niedermeier, Tim Schoenauer, J. Dienstuhl, Doris Schmitt-Landsiedel, Christian Pacha:
Performance improvement of embedded low-power microprocessor cores by selective flip flop replacement. ESSCIRC 2007: 308-311 - [c14]Florian Bauer, Klaus von Arnim, Christian Pacha, Thomas Schulz, Michael Fulde, Axel Nackaerts, M. Jurczak, Wade Xiong, K. T. San, C. Rinn Cleavelin, Klaus Schruefer, Georg Georgakos, Doris Schmitt-Landsiedel:
Layout options for stability tuning of SRAM cells in multi-gate-FET technologies. ESSCIRC 2007: 392-395 - [c13]Michael Fulde, Klaus von Arnim, Christian Pacha, Florian Bauer, Christian Russ, Domagoj Siprak, Wade Xiong, Andrew Marshall, C. Rinn Cleavelin, Klaus Schruefer, Doris Schmitt-Landsiedel, Gerhard Knoblinger:
Advances in Multi-Gate MOSFET Circuit Design. ICECS 2007: 186-189 - [c12]Andrew Marshall, C. Rinn Cleavelin, Weize Xiong, Christian Pacha, Gerhard Knoblinger, Klaus Von Armin, Thomas Schulz, Klaus Schruefer, Ken Matthews, Wolfgang Molzer, Paul Patruno, Christian Russ:
A merged MuGFET and planar SOI process. SoCC 2007: 39-42 - [c11]Gustavo Neuberger, Fernanda Gusmão de Lima Kastensmidt, Ricardo Reis, Gilson I. Wirth, Ralf Brederlow, Christian Pacha:
Statistical analysis of systematic and random variability of flip-flop race immunity in 130nm and 90nm CMOS technologies. VLSI-SoC 2007: 78-83 - 2006
- [j6]Stephan Henzler, Georg Georgakos, Matthias Eireiner, Thomas Nirschl, Christian Pacha, Jörg Berthold, Doris Schmitt-Landsiedel:
Dynamic state-retention flip-flop for fine-grained power gating with small design and power overhead. IEEE J. Solid State Circuits 41(7): 1654-1661 (2006) - [c10]Thomas Lüftner, Jörg Berthold, Christian Pacha, Georg Georgakos, Guillaume Sauzon, Olaf Hömke, Jurij Beshenar, Peter Mahrla, Knut M. Just, Peter Hober, Stephan Henzler, Doris Schmitt-Landsiedel, Andre Yakovleff, Axel Klein, Richard J. Knight, Pramod Acharya, Hamid Mabrouki, Goulhamid Juhoor, Matthias Sauer:
A 90nm CMOS low-power GSM/EDGE multimedia-enhanced baseband processor with 380MHz ARM9 and mixed-signal extensions. ISSCC 2006: 952-961 - [c9]Christian Pacha, Klaus von Arnim, Thomas Schulz, Weize Xiong, Michael Gostkowski, Gerhard Knoblinger, Andrew Marshall, Thomas Nirschl, Jörg Berthold, Christian Russ, Harald Gossner, Charvaka Duvvury, Paul Patruno, C. Rinn Cleavelin, Klaus Schruefer:
Circuit design issues in multi-gate FET CMOS technologies. ISSCC 2006: 1656-1665 - 2005
- [j5]Klaus von Arnim, Eduardo Borinski, Peter Seegebrecht, Horst Fiedler, Ralf Brederlow, Roland Thewes, Jörg Berthold, Christian Pacha:
Efficiency of body biasing in 90-nm CMOS for low-power digital circuits. IEEE J. Solid State Circuits 40(7): 1549-1556 (2005) - [c8]Stephan Henzler, Thomas Nirschi, Christian Pacha, Peter Spindler, Philip Teichmann, Michael Fulde, Jürgen Fischer, Matthias Eireiner, Thomas Fischer, Georg Georgakos, Jörg Berthold, Doris Schmitt-Landsiedel:
Dynamic state-retention flip flop for fine-grained sleep-transistor scheme. ESSCIRC 2005: 145-148 - 2004
- [c7]Klaus von Arnim, Eduardo Borinski, Peter Seegebrecht, Horst Fiedler, Ralf Brederlow, Roland Thewes, Jörg Berthold, Christian Pacha:
Efficiency of body biasing in 90 nm CMOS for low power digital circuits. ESSCIRC 2004: 175-178 - 2003
- [j4]Peter Glösekötter, Christian Pacha, Karl F. Goser, Werner Prost, Samuel O. Kim, Holger van Husen, Thorsten Reimann, Franz-Josef Tegude:
Circuit and application aspects of tunnelling devices in a MOBILE configuration. Int. J. Circuit Theory Appl. 31(1): 83-103 (2003) - 2002
- [c6]Werner Prost, Samuel O. Kim, Peter Glösekötter, Christian Pacha, Holger van Husen, Thorsten Reimann, Karl F. Goser, Franz-Josef Tegude:
Experimental threshold logic implementations based on resonant tunnelling diodes. ICECS 2002: 669-672 - [c5]Peter Glösekötter, Christian Pacha, Karl F. Goser, Werner Prost, Samuel O. Kim, Holger van Husen, Thorsten Reimann, Franz-Josef Tegude:
Asynchronous Circuit Design Based on the RTBT Monostable-Bistable Logic Transition Element (MOBILE). SBCCI 2002: 365-372 - 2001
- [c4]Werner Prost, Uwe Auer, Franz-Josef Tegude, Christian Pacha, Karl Goser, Rainer Duschl, K. Eberl, O. Schmidt:
Tunnelling Diode Technology. ISMVL 2001: 49-60 - 2000
- [j3]Werner Prost, Uwe Auer, Franz-Josef Tegude, Christian Pacha, Karl F. Goser, Guido Janssen, T. van der Roer:
Manufacturability and robust design of nanoelectronic logic circuits based on resonant tunnelling diodes. Int. J. Circuit Theory Appl. 28(6): 537-552 (2000) - [j2]Christian Pacha, Uwe Auer, Christian Burwick, Peter Glösekötter, Andreas Brennemann, Werner Prost, Franz-Josef Tegude, Karl F. Goser:
Threshold logic circuit design of parallel adders using resonant tunneling devices. IEEE Trans. Very Large Scale Integr. Syst. 8(5): 558-572 (2000) - [c3]Peter Glösekötter, Christian Pacha, Karl F. Goser, Gilson I. Wirth, Werner Prost, Uwe Auer, M. Agethen, P. Velling, Franz-Josef Tegude:
Digital Circuit Design Based on the Resonant-Tunneling-Hetero-Junction-Bipolar-Transistor. SBCCI 2000: 150-158
1990 – 1999
- 1999
- [c2]Marc Thomas, Christian Pacha, Karl Goser:
Parameter Determination for Nano-Scale Modelling. Fuzzy Days 1999: 421-426 - [c1]Christian Pacha, Peter Glösekötter, Karl Goser, Uwe Auer, Werner Prost, Franz-Josef Tegude:
Resonant Tunneling Transistors for Threshold Logic Circuit Applications. Great Lakes Symposium on VLSI 1999: 344-345 - 1997
- [j1]Karl F. Goser, Christian Pacha, Andreas Kanstein, Markus L. Rossmann:
Aspects of systems and circuits for nanoelectronics. Proc. IEEE 85(4): 558-573 (1997)
Coauthor Index
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