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Romuald Girardey

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2010 – 2019

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2012
[c6]
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  - conf/ahs/CorradiGB12
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Giulio Corradi, Romuald Girardey, Jürgen Becker:
Xilinx tools facilitate development of FPGA applications for IEC61508. AHS 2012: 54-61
2011
[c5]
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Peter Figuli, Michael Hübner, Romuald Girardey, Falco Bapp, Thomas Bruckschlögl, Florian Thoma, Jörg Henkel, Jürgen Becker:
A heterogeneous SoC architecture with embedded virtual FPGA cores and runtime Core Fusion. AHS 2011: 96-103
[c4]
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Michael Hübner, Peter Figuli, Romuald Girardey, Dimitrios Soudris, Kostas Siozios, Jürgen Becker:
A Heterogeneous Multicore System on Chip with Run-Time Reconfigurable Virtual FPGA Architecture. IPDPS Workshops 2011: 143-149
2010
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Romuald Girardey, Michael Hübner, Jürgen Becker:
Safety Aware Place and Route for On-Chip Redundancy in Safety Critical Applications. ISVLSI 2010: 74-79
[c2]
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Romuald Girardey, Michael Hübner, Jürgen Becker:
Mixed-Signal Diverse Redundant System for Safety Critical Applications in FPGA. ISVLSI 2010: 469-470

2000 – 2009

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2009
[c1]
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Romuald Girardey, Michael Hübner, Jürgen Becker:
Dynamic reconfigurable mixed-signal architecture for safety critical applications. FPL 2009: 503-506

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