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2020 – today
- 2024
[j12]Mahesh Kumar Chaubey
, Chih-Cheng Lin, Yin-Cheng Chang, Po-Chang Wu, Hann-Huei Tsai, Shawn S. H. Hsu:
A 0.01-to-2.6-GHz Two-Fold Current Reuse Dual Noise-Canceling LNA Achieving 6.8-K Noise Temperature for Quantum Applications. IEEE Trans. Circuits Syst. II Express Briefs 71(5): 2504-2508 (2024)- 2021
- [j11]Sumin D. Joseph, Yi Huang, Shawn S. H. Hsu:
Transmission Lines-Based Impedance Matching Technique for Broadband Rectifier. IEEE Access 9: 4665-4672 (2021) - [c7]Denis Daly, Shawn S. H. Hsu, Edoardo Charbon:
Session 13 Overview: Cryo-CMOS for Quantum Computing Technology Directions Subcommittee. ISSCC 2021: 206-207 - [c6]Christopher Gonzalez, Huichu Liu, Mijung Noh, Eric Karl, Thomas Toifl, Shawn S. H. Hsu:
F5: Enabling New System Architectures with 2.5D, 3D, and Chiplets. ISSCC 2021: 529-532 - 2020
- [j10]Sumin D. Joseph, Shawn S. H. Hsu, Ahmed Alieldin, Chaoyun Song, Yeke Liu, Yi Huang:
High-Power Wire Bonded GaN Rectifier for Wireless Power Transmission. IEEE Access 8: 82035-82041 (2020)
2010 – 2019
- 2018
- [j9]Ping-Yi Wang, Guan-Yu Su, Yin-Cheng Chang, Da-Chiang Chang, Shawn S. H. Hsu:
A Transformer-Based Current-Reuse QVCO With an FoM Up to -200.5 dBc/Hz. IEEE Trans. Circuits Syst. II Express Briefs 65-II(6): 749-753 (2018) - 2017
- [j8]Yi-Wei Lin, Shawn S. H. Hsu:
A Sierpinski Space-Filling Clock Tree Using Multiply-by-3 Fractal-Coupled Ring Oscillators. IEEE J. Solid State Circuits 52(11): 2947-2962 (2017) - 2015
- [c5]Ping-Yi Wang, Te-Lin Wu, Ming-Yu Chen, Yun-Chun Shen, Yin-Cheng Chang, Da-Chiang Chang, Shawn S. H. Hsu:
A low phase-noise class-C VCO using novel 8-shaped transformer. ISCAS 2015: 886-889 - 2014
- [j7]Fanta Chen, Min-Sheng Kao, Yu-Hao Hsu, Jen-Ming Wu, Ching-Te Chiu, Shawn S. H. Hsu, Mau-Chung Frank Chang:
A 10-Gb/s Low Jitter Single-Loop Clock and Data Recovery Circuit With Rotational Phase Frequency Detector. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(11): 3278-3287 (2014) - 2013
- [j6]Ching-Te Chiu, Yu-Hao Hsu, Wei-Chih Lai, Jen-Ming Wu, Shawn S. H. Hsu, Yang-Syu Lin, Fanta Chen, Min-Sheng Kao, Yarsun Hsu:
Low Propagation Delay Load-Balanced 4 × 4 Switch Fabric IC in 0.13-µm CMOS Technology. IEEE Trans. Very Large Scale Integr. Syst. 21(8): 1481-1495 (2013) - [c4]Yin-Cheng Chang, Shawn S. H. Hsu, Yen-Tang Chang, Chiu-Kuo Chen, Hsu-Chen Cheng, Da-Chiang Chang:
The direct RF power injection method up to 18 GHz for investigating IC's susceptibility. EMC Compo 2013: 167-170 - 2012
- [j5]Wei-Yu Tsai, Ching-Te Chiu, Jen-Ming Wu, Shawn S. H. Hsu, Yarsun Hsu:
A Novel Low Gate-Count Pipeline Topology With Multiplexer-Flip-Flops for Serial Link. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(11): 2600-2610 (2012) - [c3]Wei-Yu Tsai, Ching-Te Chiu, Jen-Ming Wu, Shawn S. H. Hsu, Yarsun Hsu, Ying-Fang Tsao:
A novel low gate-count serializer topology with Multiplexer-Flip-Flops. ISCAS 2012: 245-248 - 2011
- [c2]Shawn S. H. Hsu, Ming-Hsien Tsai:
Low-noise amplifiers with robust ESD protection for RF SOC. ISOCC 2011: 112-115
2000 – 2009
- 2009
- [j4]Min-Sheng Kao, Jen-Ming Wu, Chih-Hsing Lin, Fanta Chen, Ching-Te Chiu, Shawn S. H. Hsu:
A 10-Gb/s CML I/O Circuit for Backplane Interconnection in 0.18-µm CMOS Technology. IEEE Trans. Very Large Scale Integr. Syst. 17(5): 688-696 (2009) - 2008
- [j3]Jun-De Jin, Shawn S. H. Hsu:
A 0.18-µm CMOS Balanced Amplifier for 24-GHz Applications. IEEE J. Solid State Circuits 43(2): 440-445 (2008) - [j2]Jun-De Jin, Shawn S. H. Hsu:
A 40-Gb/s Transimpedance Amplifier in 0.18-µm CMOS Technology. IEEE J. Solid State Circuits 43(6): 1449-1457 (2008) - 2007
- [j1]Hong-Yu Lin, Shawn S. H. Hsu, Chih-Yuan Chan, Jun-De Jin, Yu-Syuan Lin:
A Wide Locking-Range Frequency Divider for LMDS Applications. IEEE Trans. Circuits Syst. II Express Briefs 54-II(9): 750-754 (2007) - [c1]Long-Sheng Fan, Shawn S. H. Hsu, Jun-De Jin, Cheng-Vu Hsieh, Wei-Chen Lin, H. C. Hao, Hsin-Li Cheng, Kuo-Chin Hsueh, Chen-Zong Lee:
Miniaturization of Magnetic Resonance Microsystem Components for 3D Cell Imaging. ISSCC 2007: 166-594
Coauthor Index
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