"A high-speed shuffle bus for VLSI arrays."

Wen-Tai Lin, Jyh-Ping Hwang (1988)

> Home

Details and statistics

DOI: 10.1109/4.263

access: closed

type: Journal Article

metadata version: 2024-11-05

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jssc/LinH88
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/LinH88
Wen-Tai Lin, Jyh-Ping Hwang:
A high-speed shuffle bus for VLSI arrays. IEEE J. Solid State Circuits 23(1): 98-104 (1988)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.