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ORCIDJohn W. M. Rogers
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2020 – today
- 2023
[c14]Shakeeb Abdullah, John W. M. Rogers, Wenyu Zhou, Rony E. Amaya:
A 56 GHz InP VCO for Use in 112 GBaud (112 GBit/s NRZ or 224 GBit/s PAM-4) InP Integrated Optical Receiver Front-End CDR Block. CCECE 2023: 381-386- 2022
- [c13]Shakeeb Abdullah, John W. M. Rogers, Rony E. Amaya
:
A 5.56 GHz Single Core Digitally-Controlled Oscillator With Direct Fine Tuning Steps of 2.85 kHz. CCECE 2022: 200-204 - [c12]Shakeeb Abdullah, John W. M. Rogers, Rony E. Amaya:
Using TFM Analysis and Memory Map Calibration for Designing Linear and Monotonic LC DCOs. CCECE 2022: 205-212 - [c11]Shakeeb Abdullah, John W. M. Rogers, Rony E. Amaya:
A 6 GHz Digitally-Controlled Oscillator Achieving Minimum Fine Tuning Step Size of Up to 160 Hz Using Capacitive Degeneration Technique in 40 nm CMOS Process. ICM 2022: 144-147 - 2020
- [j15]Shakeeb Abdullah, John W. M. Rogers:
Topographical Field Map Analysis Tool for Designing Linear LC DCOs. IEEE Trans. Circuits Syst. II Express Briefs 67-II(7): 1199-1203 (2020)
2010 – 2019
- 2019
- [j14]Tuoxin Wang, John W. M. Rogers, Krste Mitric:
Analysis and Correction of Noise Injection Due to Parallel-Output-Misalignment (POM) Effects in Ring-Type Time-to-Digital Converters (TDCs). IEEE J. Solid State Circuits 54(9): 2513-2522 (2019) - 2017
- [j13]Mackenzie Cook, John W. M. Rogers:
A Highly Compact 2.4-GHz Passive 6-bit Phase Shifter With Ambidextrous Quadrant Selector. IEEE Trans. Circuits Syst. II Express Briefs 64-II(2): 131-135 (2017) - 2016
- [j12]Jose Augusto Lima, John W. M. Rogers, Rony E. Amaya:
Finding the Initial Estimate for the Diode Bias Point in Multiport Receivers. IEEE Trans. Circuits Syst. II Express Briefs 63-II(1): 34-38 (2016) - 2015
- [j11]Jose Augusto Lima, John W. M. Rogers, Rony E. Amaya:
Optimization of EVM Through Diode Bias Control Using a Blind Algorithm Applied to Multiport Receivers. IEEE Trans. Circuits Syst. II Express Briefs 62-II(3): 286-290 (2015) - [j10]Jerry Lam, Tom A. D. Riley, Norman M. Filiol, John W. M. Rogers, Calvin Plett:
A 0.009-1.4-GHz Frequency Synthesizer With Suppressed Transients During VCO Band Switching. IEEE Trans. Circuits Syst. II Express Briefs 62-II(12): 1129-1133 (2015) - 2014
- [j9]José M. de la Rosa, John W. M. Rogers, Vikas Chandra:
Guest Editorial - Special Section on the 2013 IEEE Custom Integrated Circuits Conference (CICC 2013). IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(8): 2217-2218 (2014) - 2013
- [j8]Shanthi Pavan, John W. M. Rogers, Vikas Chandra:
Guest Editorial: Special Section on the 2012 IEEE Custom Integrated Circuits Conference (CICC 2012). IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(8): 1977-1978 (2013) - 2012
- [c10]Richard Beare, Calvin Plett, John W. M. Rogers:
Highly reconfigurable single-ended low noise amplifier for software defined radio applications. NEWCAS 2012: 549-552 - 2010
- [j7]Shahriar Mirabbasi, John W. M. Rogers, Gabriele Manganaro:
Guest Editorial Special Section on 2009 IEEE Custom Integrated Circuits Conference. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(9): 2245-2247 (2010)
2000 – 2009
- 2008
- [j6]Peter H. R. Popplewell, Victor Karam, Atif Shamim, John W. M. Rogers, Langis Roy, Calvin Plett:
A 5.2-GHz BFSK Transceiver Using Injection-Locking and an On-Chip Antenna. IEEE J. Solid State Circuits 43(4): 981-990 (2008) - 2006
- [j5]John W. M. Rogers, Foster F. Dai, Calvin Plett, Mark S. Cavin:
Design and Characterization of a 5.2 GHz/2.4 GHz ΣΔ Fractional-N Frequency Synthesizer for Low-Phase Noise Performance. EURASIP J. Wirel. Commun. Netw. 2006 (2006) - [c9]Atef Shamim, Peter H. R. Popplewell, Victor Karam, Langis Roy, John W. M. Rogers, Calvin Plett:
Silicon Differential Antenna/Inductor for Short Range Wireless Communication Applications. CCECE 2006: 94-97 - [c8]T. Lovitt, Calvin Plett, John W. M. Rogers:
A 0.13µm CMOS delay cell for 40 Gb/s FFE equalization. ISCAS 2006 - [c7]Peter H. R. Popplewell, Victor Karam, Atef Shamim, John W. M. Rogers, Mark Cloutier, Calvin Plett:
5.2 GHz self-powered lock and roll radio using VCO injection-locking and on-chip antennas. ISCAS 2006 - 2005
- [j4]John W. M. Rogers, Foster F. Dai, Mark S. Cavin, David G. Rahn:
A multiband ΔΣ fractional-N frequency synthesizer for a MIMO WLAN transceiver RFIC. IEEE J. Solid State Circuits 40(3): 678-689 (2005) - [j3]David G. Rahn, Mark S. Cavin, Fa Foster Dai, Neric H. W. Fong, Richard Griffith, José Macedo, A. David Moore, John W. M. Rogers, Mike Toner:
A fully integrated multiband MIMO WLAN transceiver RFIC. IEEE J. Solid State Circuits 40(8): 1629-1641 (2005) - [c6]Justin P. Abbott, Calvin Plett, John W. M. Rogers:
A 15 GHz, 1.8V, variable-gain, modified Cherry-Hooper amplifier. CICC 2005: 645-648 - [c5]Justin P. Abbott, Calvin Plett, John W. M. Rogers:
A 1.2V CMOS multiplier for 10 Gbit/s equalization. ESSCIRC 2005: 379-382 - [c4]Justin P. Abbott, Calvin Plett, John W. M. Rogers:
A low voltage CMOS multiplier for high frequency equalization. ISCAS (3) 2005: 1936-1939 - 2004
- [c3]Paul W. M. Laferriere, Dave Rahn, Calvin Plett, John W. M. Rogers:
A 5 GHz direct-conversion receiver with DC offset correction. ISCAS (4) 2004: 269-272 - 2003
- [j2]John W. M. Rogers, David G. Rahn, Calvin Plett:
A study of digital and analog automatic-amplitude control circuitry for voltage-controlled oscillators. IEEE J. Solid State Circuits 38(2): 352-356 (2003) - [c2]John W. M. Rogers, Mark S. Cavin, Fa Foster Dai, David G. Rahn:
A ΔΣ fractional-N frequency synthesizer with a multi-band PMOS VCOs for 2.4 and 5GHz WLAN applications. ESSCIRC 2003: 651-654 - 2001
- [c1]John W. M. Rogers, Vladislav Levenets, Chris A. Pawlowicz, N. Garry Tarr, Tom J. Smy, Calvin Plett:
A completely integrated 2 GHz VCO with post-processed Cu inductors. CICC 2001: 575-578 - 2000
- [j1]John W. M. Rogers, José Macedo, Calvin Plett:
The effect of varactor nonlinearity on the phase noise of completely integrated VCOs. IEEE J. Solid State Circuits 35(9): 1360-1367 (2000)
Coauthor Index
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