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2020 – today
- 2024
[c15]Marius Meyer, Tobias Kenter, Lucian Petrica, Kenneth O'Brien, Michaela Blott, Christian Plessl:
Optimizing Communication for Latency Sensitive HPC Applications on up to 48 FPGAs Using ACCL. Euro-Par (2) 2024: 121-136- [c14]Pedro Henrique Di Francia Rosso
, Lucian Petrica, Nusrat Jahan Lisa, Márcio Machado Pereira, Sandro Rigo, Hervé Yviquel, Vanderlei Bonato, Emilio Francesquini, Guido Araujo:
Integrating Multi-FPGA Acceleration to OpenMP Distributed Computing. IWOMP 2024: 49-63 - [c13]Zhenhao He, Dario Korolija, Yu Zhu, Benjamin Ramhorst, Tristan Laan, Lucian Petrica, Michaela Blott, Gustavo Alonso:
ACCL+: an FPGA-Based Collective Engine for Distributed Applications. OSDI 2024: 211-231 - [i4]Marius Meyer, Tobias Kenter, Lucian Petrica, Kenneth O'Brien, Michaela Blott, Christian Plessl:
Optimizing Communication for Latency Sensitive HPC Applications on up to 48 FPGAs Using ACCL. CoRR abs/2403.18374 (2024) - 2023
- [i3]Zhenhao He, Dario Korolija, Yu Zhu, Benjamin Ramhorst, Tristan Laan, Lucian Petrica, Michaela Blott, Gustavo Alonso:
ACCL+: an FPGA-Based Collective Engine for Distributed Applications. CoRR abs/2312.11742 (2023) - 2022
- [j2]Tobias Alonso, Lucian Petrica, Mario Ruiz, Jakoba Petri-Koenig, Yaman Umuroglu, Ioannis Stamelos, Elias Koromilas, Michaela Blott, Kees A. Vissers:
Elastic-DF: Scaling Performance of DNN Inference in FPGA Clouds through Automatic Partitioning. ACM Trans. Reconfigurable Technol. Syst. 15(2): 15:1-15:34 (2022) - [c12]Dana Diaconu, Lucian Petrica, Michaela Blott, Miriam Leeser:
Machine Learning Aided Hardware Resource Estimation for FPGA DNN Implementations. IPDPS Workshops 2022: 77-83 - 2021
- [c11]Zhenhao He, Daniele Parravicini, Lucian Petrica, Kenneth O'Brien, Gustavo Alonso, Michaela Blott:
ACCL: FPGA-Accelerated Collectives over 100 Gbps TCP-IP. H2RC@SC 2021: 33-43 - 2020
- [c10]Gurshaant Singh Malik, Lucian Petrica, Nachiket Kapre, Michaela Blott:
DarwiNN: efficient distributed neuroevolution under communication constraints. GECCO Companion 2020: 141-142 - [c9]Mairin Kroes, Lucian Petrica, Sorin Cotofana, Michaela Blott:
Evolutionary bin packing for memory-efficient dataflow inference acceleration on FPGA. GECCO 2020: 1125-1133 - [c8]Lucian Petrica, Tobias Alonso, Mairin Kroes, Nicholas J. Fraser, Sorin Cotofana, Michaela Blott:
Memory-Efficient Dataflow Inference for Deep CNNs on FPGA. FPT 2020: 48-55 - [i2]Mairin Kroes, Lucian Petrica, Sorin Cotofana, Michaela Blott:
Evolutionary Bin Packing for Memory-Efficient Dataflow Inference Acceleration on FPGA. CoRR abs/2003.12449 (2020) - [i1]Lucian Petrica, Tobias Alonso, Mairin Kroes, Nicholas J. Fraser, Sorin Cotofana, Michaela Blott:
Memory-Efficient Dataflow Inference for Deep CNNs on FPGA. CoRR abs/2011.07317 (2020)
2010 – 2019
- 2019
- [c7]Ovidiu Plugariu, Lucian Petrica, Radu Pirea, Radu Hobincu:
Hadoop ZedBoard cluster with GZIP compression FPGA acceleration. ECAI 2019: 1-5 - 2018
- [j1]Lucian Petrica:
FPGA optimized cellular automaton random number generator. J. Parallel Distributed Comput. 111: 251-259 (2018) - 2017
- [c6]Ovidiu Plugariu, Alexandru Dumitru Gegiu, Lucian Petrica:
FPGA systolic array GZIP compressor. ECAI 2017: 1-6 - 2016
- [c5]Alexandru E. Susu, Valeriu Codreanu, Georgios Evangelidis, Lucian Petrica:
Efficient implementation of a video change detection algorithm. COMM 2016: 77-82 - 2015
- [c4]Alexandru Gheolbanoiu, Lucian Petrica, Sorin Cotofana:
Hybrid adaptive clock management for FPGA processor acceleration. DATE 2015: 1359-1364 - 2014
- [c3]Andi Buzo, Horia Cucu, Lucian Petrica, Dragos Burileanu, Corneliu Burileanu:
An Automatic Speech Recognition solution with speaker identification support. COMM 2014: 1-4 - [c2]Horia Cucu, Andi Buzo, Lucian Petrica, Dragos Burileanu, Corneliu Burileanu:
Recent improvements of the SpeeD Romanian LVCSR system. COMM 2014: 1-4 - [c1]Lucian Petrica, Horia Cucu, Andi Buzo, Corneliu Burileanu:
A robust diacritics restoration system using unreliable raw text data. SLTU 2014: 215-220
Coauthor Index
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last updated on 2024-10-23 21:29 CEST by the dblp team
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