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Chia-Pin Chiu
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2020 – today
- 2024
- [c3]Yuyang Wang, Songli Wang, Robert Parsons, Asher Novick, Vignesh Gopal, Kaylx Jang, Anthony Rizzo, Chia-Pin Chiu, Kaveh Hosseini, Tim Tri Hoang, Sergey Y. Shumarayev, Keren Bergman:
Silicon Photonics Chip I/O for Ultra High-Bandwidth and Energy-Efficient Die-to-Die Connectivity. CICC 2024: 1-8 - 2022
- [c2]Kaveh Hosseini, Edwin Kok, Sergey Y. Shumarayev, Daniel Jeong, Allen Chan, Austin Katzin, Songtao Liu, Radek Roucka, Manan Raval, Minh Mac, Chia-Pin Chiu, Thungoc Tran, Kumar Abhishek Singh, Sangeeta Raman, Yanjing Ke, Chen Li, Li-Fan Yang, Paulo Chao, Haiwei Lu, Fernando Luna, Xiaoqian Li, Tim Tri Hoang, Arnab Sarkar, Asako Toda, Ravi Mahajan, Nitin Deshpande, Conor O'Keeffe, Uma Krishnamoorthy, Vladimir Stojanovic, Christopher Madden, Chong Zhang, Matt Sysak, Pavan Bhargava, Chen Sun, Mark Wade:
5.12 Tbps Co-Packaged FPGA and Silicon Photonics Interconnect I/O. VLSI Technology and Circuits 2022: 260-261 - 2021
- [c1]Kaveh Hosseini, Edwin Kok, Sergey Y. Shumarayev, Chia-Pin Chiu, Arnab Sarkar, Asako Toda, Yanjing Ke, Allen Chan, Daniel Jeong, Mason Zhang, Sangeeta Raman, Thungoc Tran, Kumar Abhishek Singh, Pavan Bhargava, Chong Zhang, Haiwei Lu, Ravi Mahajan, Xiaoqian Li, Nitin Deshpande, Conor O'Keeffe, Tim Tri Hoang, Uma Krishnamoorthy, Chen Sun, Roy Meade, Vladimir Stojanovic, Mark Wade:
8 Tbps Co-Packaged FPGA and Silicon Photonics Optical IO. OFC 2021: 1-3
2000 – 2009
- 2006
- [j2]Ravi Mahajan, Chia-Pin Chiu, Greg Chrysler:
Cooling a Microprocessor Chip. Proc. IEEE 94(8): 1476-1486 (2006) - 2002
- [j1]Chia-Pin Chiu, James Maveety, Quan A. Tran:
Characterization of solder interfaces using laser flash metrology. Microelectron. Reliab. 42(1): 93-100 (2002)
Coauthor Index
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last updated on 2024-10-07 22:05 CEST by the dblp team
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