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ORCIDLarry L. Kinney
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2000 – 2009
- 2004
[c21]Xiaoyun Sun, Larry L. Kinney, Bapiraju Vinnakota:
Combining dictionary coding and LFSR reseeding for test data compression. DAC 2004: 944-947- 2003
- [c20]Xiaoyun Sun, Larry L. Kinney, Bapiraju Vinnakota:
Test Vector Generation Based on Correlation Model for Ratio-Iddq. ITC 2003: 545-554 - [c19]Xiaoyun Sun, Larry L. Kinney, Bapiraju Vinnakota:
Development of Energy Consumption Ratio Test. VTS 2003: 279-286
1990 – 1999
- 1999
- [j8]Gyungho Lee, Bland Quattlebaum, Sangyeun Cho, Larry L. Kinney:
Design of a bus-based shared-memory multiprocessor DICE. Microprocess. Microsystems 22(7): 403-411 (1999) - 1996
- [c18]Gyungho Lee, Bland Quattlebaum, Sangyeun Cho, Larry L. Kinney:
Global Bus Design of a Bus-Based COMA Multiprocessor DICE. ICCD 1996: 231-240 - 1993
- [c17]Sang-Hoon Song, Larry L. Kinney:
Incremental test pattern generation. VTS 1993: 244-250 - 1992
- [j7]Aloke Guha, Larry L. Kinney:
Relating the Cyclic Behavior of Linear and Intrainverted Feedback Shift Registers. IEEE Trans. Computers 41(9): 1088-1100 (1992) - 1991
- [c16]Lawrence P. Holmquist, Larry L. Kinney:
Concurrent Error Detection in Sequential Circuits Using Convolutional Codes. AAECC 1991: 183-194 - [c15]Lawrence P. Holmquist, Larry L. Kinney:
Concurrent Error Detection for Restricted Fault Sets in Sequential Circuits and Microprogrammed Control Units Using Convolutional Codes. ITC 1991: 926-935 - 1990
- [c14]George Foo, Larry L. Kinney:
Integrated Pull Manufacturing: The Integration of MAP and PULL Systems. ICSI 1990: 415-425
1980 – 1989
- 1988
- [c13]Jianjian Song, Larry L. Kinney:
Distributed Termination on a Mesh. ICPP (1) 1988: 83-85 - [c12]Lawrence P. Holmquist, Larry L. Kinney:
Error Detection with Latency in Sequential Circuits. ITC 1988: 926-933 - [c11]A. Bailas, Larry L. Kinney:
Evaluation of a concurrent error detection method for microprogrammed control units. MICRO 1988: 1-10 - 1986
- [j6]Hasan Elhuni, Anastasios Vergis, Larry L. Kinney:
C-Testability of Two-Dimensional Iterative Arrays. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 5(4): 573-581 (1986) - [c10]Vladimir Cherkassky, Larry L. Kinney:
A Group Probing Strategy for Testing Large Number of Chips. ITC 1986: 853-856 - [c9]Hasan Elhuni, Larry L. Kinney:
Techniques for Testing Hexagonally Connected Systolic Arrays. ITC 1986: 888-894 - 1985
- [j5]Vijay S. Iyengar, Larry L. Kinney:
Concurrent Fault Detection in Microprogrammed Control Units. IEEE Trans. Computers 34(9): 810-821 (1985) - 1984
- [c8]Tammy Chan, Devesh Bhatt, Walter L. Heimerdinger, Larry L. Kinney, Marvin Lum:
A High-Performance, Multi-Link, Multi-Protocol Data Link Controller for an Experimental Distributed Computer Testbed. ICDCS 1984: 398-405 - 1982
- [c7]Vijay S. Iyengar, Larry L. Kinney:
Concurrent Testing of Flow of Control in Simple Microprogrammed Control Units. ITC 1982: 469-479 - 1981
- [c6]Larry L. Kinney, W. Y. Yueh, Walter L. Heimerdinger, Richard R. Ramseyer, J. W. Thomas:
An Architecture for a VHSIC Computer. ISCA 1981: 459-470 - [c5]J. W. Thomas, Richard R. Ramseyer, Larry L. Kinney:
Fault Tolerant Distributed Computing with Very High Speed Integrated Circuits. RTSS 1981: 62-70
1970 – 1979
- 1978
- [c4]Larry L. Kinney, R. G. Arnold:
Analysis of a Multiprocessor System with a Shared Bus. ISCA 1978: 89-95 - 1972
- [j4]Larry L. Kinney:
B72-11 An Introduction to Switching System Design. IEEE Trans. Computers 21(5): 518 (1972) - [c3]Kenneth J. Thurber, E. Douglas Jensen, Larry A. Jack, Larry L. Kinney, Peter C. Patton, Lynn C. Anderson:
A systematic approach to the design of digital bussing structures. AFIPS Fall Joint Computing Conference (2) 1972: 719-740 - [c2]C. C. Huang, Richard Y. Kain, Larry L. Kinney:
Output Sufficient Modules for Uniform Decomposition of Synchronous Sequential Circuits. SWAT 1972: 192-199 - 1971
- [j3]Larry L. Kinney:
A Characterization of Some Asynchronous Sequential Networks and State Assignments. IEEE Trans. Computers 20(4): 426-436 (1971) - [j2]Robert Orval Berg, Larry L. Kinney:
Serial Adders with Overflow Correction. IEEE Trans. Computers 20(6): 668-671 (1971) - 1970
- [j1]Larry L. Kinney:
Decomposition of Asynchronous Sequential Switching Circuits. IEEE Trans. Computers 19(6): 515-529 (1970)
1960 – 1969
- 1968
- [c1]Larry L. Kinney:
A Characterization of Some Asynchronous State Assignments. SWAT 1968: 20-27
Coauthor Index
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