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ORCIDYoungho Lim
This is just a disambiguation page, and is not intended to be the bibliography of an actual person. Any publication listed on this page has not been assigned to an actual author yet. If you know the true author of one of the publications listed below, you are welcome to contact us.
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2010 – 2019
- 2012
[j12]Chulbum Kim, Jinho Ryu, Tae-Sung Lee, Hyunggon Kim, Jaewoo Lim, Jaeyong Jeong, Seonghwan Seo, Hongsoo Jeon, Bokeun Kim, Inyoul Lee, Dooseop Lee, Pansuk Kwak, Seongsoon Cho, Yongsik Yim, Changhyun Cho, Woopyo Jeong, Kwang-Il Park, Jin-Man Han, Duheon Song, Kyehyun Kyung, Youngho Lim, Young-Hyun Jun:
A 21 nm High Performance 64 Gb MLC NAND Flash Memory With 400 MB/s Asynchronous Toggle DDR Interface. IEEE J. Solid State Circuits 47(4): 981-989 (2012)- [c5]Daeyeal Lee, Ik Joon Chang, Sangyong Yoon, Joonsuc Jang, Dong-Su Jang, Wook-Ghee Hahn, Jong-Yeol Park, Doo-Gon Kim, Chiweon Yoon, Bong-Soon Lim, ByungJun Min, Sung-Won Yun, Ji-Sang Lee, Il-Han Park, Kyung-Ryun Kim, Jeong-Yun Yun, Youse Kim, Yong-Sung Cho, Kyung-Min Kang, Sang-Hyun Joo, Jin-Young Chun, Jung-No Im, Seunghyuk Kwon, Seokjun Ham, Ansoo Park, Jae-Duk Yu, Nam-Hee Lee, Tae-Sung Lee, Moosung Kim, Hoosung Kim, Ki-Whan Song, Byung-Gil Jeon, Kihwan Choi, Jin-Man Han, Kyehyun Kyung, Youngho Lim, Young-Hyun Jun:
A 64Gb 533Mb/s DDR interface MLC NAND Flash in sub-20nm technology. ISSCC 2012: 430-432 - 2011
- [c4]Ki-Tae Park, Ohsuk Kwon, Sangyong Yoon, Myung-Hoon Choi, In-Mo Kim, Bo-Geun Kim, Min-Seok Kim, Yoon-Hee Choi, Seung-Hwan Shin, Youngson Song, Joo-Yong Park, Jae-Eun Lee, Chang-Gyu Eun, Ho-Chul Lee, Hyeong-Jun Kim, Jun-Hee Lee, Jong-Young Kim, Tae-Min Kweon, Hyun-Jun Yoon, Taehyun Kim, Dong-Kyo Shim, Jongsun Sel, Ji-Yeon Shin, Pansuk Kwak, Jin-Man Han, Keon-Soo Kim, Sungsoo Lee, Youngho Lim, Tae-Sung Jung:
A 7MB/s 64Gb 3-bit/cell DDR NAND flash memory in 20nm-node technology. ISSCC 2011: 212-213 - 2010
- [j11]Myounggon Kang, Ki-Tae Park, Youngsun Song, Sungsoo Lee, Yunheub Song, Youngho Lim:
A Low Power and Area Scalable High Voltage Switch Technique for Low Operation Voltage in MLC NAND Flash Memory. IEICE Trans. Electron. 93-C(2): 182-186 (2010) - [j10]Youngsun Song, Ki-Tae Park, Myounggon Kang, Yunheub Song, Sungsoo Lee, Youngho Lim, Kang-Deog Suh:
Boosted Bit Line Program Scheme for Low Operating Voltage MLC NAND Flash Memory. IEICE Trans. Electron. 93-C(3): 423-425 (2010) - [j9]Ki-Tae Park, Youngsun Song, Myounggon Kang, Sungsoo Lee, Youngho Lim, Kang-Deog Suh, Chilhee Chung:
Dynamic Vpass Controlled Program Scheme and Optimized Erase Vth Control for High Program Inhibition in MLC NAND Flash Memories. IEEE J. Solid State Circuits 45(10): 2165-2172 (2010)
2000 – 2009
- 2003
- [j8]June Lee, Sung-Soo Lee, Oh-Suk Kwon, Kyeong-Han Lee, Dae-Seok Byeon, In-Young Kim, Kyoung-Hwa Lee, Young-Ho Lim, Byung-Soon Choi, Jong-Sik Lee, Wang-Chul Shin, Jeong-Hyuk Choi, Kang-Deog Suh:
A 90-nm CMOS 1.8-V 2-Gb NAND flash memory for mass storage applications. IEEE J. Solid State Circuits 38(11): 1934-1942 (2003) - [c3]Karpjoo Jeong, Dongwook Kim, Moon-hae Kim, Suntae Hwang, Seunho Jung, Youngho Lim, Sangsan Lee:
A Workflow Management and Grid Computing Approach to Molecular Simulation-Based Bio/Nano Experiments. International Conference on Computational Science 2003: 1117-1126 - 2002
- [j7]June Lee, Heung-Soo Im, Dae-Seok Byeon, Kyeong-Han Lee, Dong-Hyuk Chae, Kyong-Hwa Lee, Sang Won Hwang, Sung-Soo Lee, Young-Ho Lim, Jae-Duk Lee, Jung-Dal Choi, Young-Il Seo, Jong-Sik Lee, Kang-Deog Suh:
High-performance 1-Gb-NAND flash memory with 0.12-μm technology. IEEE J. Solid State Circuits 37(11): 1502-1509 (2002) - 2001
- [j6]Taehee Cho, Yeong-Taek Lee, Eun-Cheol Kim, Jin-Wook Lee, Sunmi Choi, Seungjae Lee
, Dong-Hwan Kim, Wook-Ghee Han, Young-Ho Lim, Jae-Duk Lee, Jung-Dal Choi, Kang-Deog Suh:
A dual-mode NAND flash memory: 1-Gb multilevel and high-performance 512-Mb single-level modes. IEEE J. Solid State Circuits 36(11): 1700-1706 (2001)
1990 – 1999
- 1996
- [j5]Tae-Sung Jung, Young-Joon Choi, Kang-Deog Suh, Byung-Hoon Suh, Jin-Ki Kim, Young-Ho Lim, Yong-Nam Koh, Jong-Wook Park, Ki-Jong Lee, Jung-Hoon Park, Kee-Tae Park, Jhang-Rae Kim, Jeong-Hyong Yi, Hyung-Kyu Lim:
A 117-mm2 3.3-V only 128-Mb multilevel NAND flash memory for mass storage applications. IEEE J. Solid State Circuits 31(11): 1575-1583 (1996) - 1995
- [j4]Kang-Deog Suh, Byung-Hoon Suh, Young-Ho Lim, Jin-Ki Kim, Young-Joon Choi, Yong-Nam Koh, Sung-Soo Lee, Suk-Chon Kwon, Byung-Soon Choi, Jin-Sun Yum, Jung-Hyuk Choi, Jang-Rae Kim, Hyung-Kyu Lim:
A 3.3 V 32 Mb NAND flash memory with incremental step pulse programming scheme. IEEE J. Solid State Circuits 30(11): 1149-1156 (1995) - 1990
- [j3]Youngho Lim:
Minimum-Cost Dimensioning Model for Common Channel Signaling Networks Under Joint Performance and Reliability Constraints. IEEE J. Sel. Areas Commun. 8(9): 1658-1666 (1990) - [j2]Youngho Lim, John E. Kobza:
Analysis of a delay-dependent priority discipline in an integrated multiclass traffic fast packet switch. IEEE Trans. Commun. 38(5): 659-665 (1990)
1980 – 1989
- 1989
- [c2]Kyoo Jeong Lee, Youngho Lim:
Performance Analysis of the Congestion Control Scheme in Signaling System No. 7. INFOCOM 1989: 691-700 - 1988
- [c1]Youngho Lim, John E. Kobza:
Analysis of a delay-dependent priority discipline in a multi-class traffic packet switching node. INFOCOM 1988: 889-898 - 1986
- [j1]Youngho Lim, Ulrike Tillmann:
End-to-End Speech Freeze-Out Fractions in a Network with Speech Interpolations. IEEE Trans. Commun. 34(12): 1236-1245 (1986)
Coauthor Index
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