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ORCIDMichalis D. Galanis
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2000 – 2009
- 2009
[j22]Grigoris Dimitroulakos, Stavros Georgiopoulos, Michalis D. Galanis, Costas E. Goutis:
Resource aware mapping on coarse grained reconfigurable arrays. Microprocess. Microsystems 33(2): 91-105 (2009)- [j21]Grigoris Dimitroulakos, Nikos Kostaras, Michalis D. Galanis, Costas E. Goutis:
Compiler assisted architectural exploration framework for coarse grained reconfigurable arrays. J. Supercomput. 48(2): 115-151 (2009) - 2008
- [j20]Harris E. Michail, Georgios N. Selimis, Michalis D. Galanis, Dimitrios M. Schinianakis, Constantinos E. Goutis:
Novel Hardware Implementation of the Cipher Message Authentication Code. J. Comput. Networks Commun. 2008: 923079:1-923079:6 (2008) - [j19]Michalis D. Galanis, Costas E. Goutis:
Speedups from extending embedded processors with a high-performance coarse-grained reconfigurable data-path. J. Syst. Archit. 54(5): 479-490 (2008) - [j18]Michalis D. Galanis, Gregory Dimitroulakos, Costas E. Goutis:
Performance and Energy Consumption Improvements in Microprocessor Systems Utilizing a Coprocessor Data-Path. J. Signal Process. Syst. 50(2): 179-200 (2008) - 2007
- [j17]Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis:
Automated framework for partitioning DSP applications in hybrid reconfigurable platforms. Microprocess. Microsystems 31(1): 1-14 (2007) - [j16]Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis:
Exploring the speedups of embedded microprocessor systems utilizing a high-performance coprocessor data-path. J. Supercomput. 39(3): 251-271 (2007) - [j15]Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis:
Design space exploration of an optimized compiler approach for a generic reconfigurable array architecture. J. Supercomput. 40(2): 127-157 (2007) - [j14]Michalis D. Galanis, Gregory Dimitroulakos, Spyros Tragoudas, Costas E. Goutis:
Speedups in embedded systems with a high-performance coprocessor datapath. ACM Trans. Design Autom. Electr. Syst. 12(3): 35:1-35:22 (2007) - [j13]Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis:
Speedups and Energy Reductions From Mapping DSP Applications on an Embedded Reconfigurable System. IEEE Trans. Very Large Scale Integr. Syst. 15(12): 1362-1366 (2007) - [c35]Grigoris Dimitroulakos, Michalis D. Galanis, Nikos Kostaras, Costas E. Goutis:
A unified evaluation framework for coarse grained reconfigurable array architectures. Conf. Computing Frontiers 2007: 161-172 - [c34]Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis:
Improving performance and energy consumption in embedded microprocessor platforms with a flexible custom coprocessor data-path. ACM Great Lakes Symposium on VLSI 2007: 2-7 - [c33]Grigoris Dimitroulakos, Nikos Kostaras, Michalis D. Galanis, Costas E. Goutis:
Compiler assisted architectural exploration for coarse grained reconfigurable arrays. ACM Great Lakes Symposium on VLSI 2007: 164-167 - [c32]Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis:
Speedups and Energy Savings of Microprocessor Platforms with a Coarse-Grained Reconfigurable Data-Path. IPDPS 2007: 1-8 - [c31]Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis:
Performance Optimization of Embedded Applications in a Hybrid Reconfigurable Platform. PATMOS 2007: 352-362 - [i1]Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis:
A Partitioning Methodology for Accelerating Applications in Hybrid Reconfigurable Platforms. CoRR abs/0710.4844 (2007) - 2006
- [j12]Paris Kitsos
, Michalis D. Galanis, Odysseas G. Koufopavlou:
Architectures and FPGA Implementations of the 64-Bit MISTY1 Block Cipher. J. Circuits Syst. Comput. 15(6): 817-831 (2006) - [j11]Michalis D. Galanis, Athanasios Milidonis, Athanasios Kakarountas, Costas E. Goutis:
A design flow for speeding-up dsp applications in heterogeneous reconfigurable systems. Microelectron. J. 37(6): 554-564 (2006) - [j10]Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Constantinos E. Goutis:
A high-performance data path for synthesizing DSP kernels. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(6): 1154-1162 (2006) - [j9]Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis:
Performance Improvements from Partitioning Applications to FPGA Hardware in Embedded SoCs. J. Supercomput. 35(2): 185-199 (2006) - [j8]Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis:
Partitioning Methodology for Heterogeneous Reconfigurable Functional Units. J. Supercomput. 38(1): 17-34 (2006) - [c30]Grigoris Dimitroulakos, Michalis D. Galanis, Constantinos E. Goutis:
Exploring the design space of an optimized compiler approach for mesh-like coarse-grained reconfigurable architectures. IPDPS 2006 - [c29]Michalis D. Galanis, Grigoris Dimitroulakos, Constantinos E. Goutis:
Design flow for optimizing performance in processor systems with on-chip coarse-grain reconfigurable logic. IPDPS 2006 - [c28]Michalis D. Galanis, Grigoris Dimitroulakos, Constantinos E. Goutis:
Mapping DSP applications on processor systems with coarse-grain reconfigurable hardware. IPDPS 2006 - [c27]Grigoris Dimitroulakos, Michalis D. Galanis, Constantinos E. Goutis:
Resource constrained modulo scheduling for coarse-grained reconfigurable arrays. ISCAS 2006 - [c26]Michalis D. Galanis, Grigoris Dimitroulakos, Constantinos E. Goutis:
Mapping DSP applications on processor/coarse-grain reconfigurable array architectures. ISCAS 2006 - [c25]Michalis D. Galanis, Gregory Dimitroulakos, Costas E. Goutis:
Performance Improvements in Microprocessor Systems Utilizing a Copressor Data-Path. ICSAMOS 2006: 85-92 - 2005
- [j7]Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Costas E. Goutis:
A method for partitioning applications in hybrid reconfigurable architectures. Des. Autom. Embed. Syst. 10(1): 27-47 (2005) - [j6]Michalis D. Galanis, Paris Kitsos, Giorgos Kostopoulos, Nicolas Sklavos, Constantinos E. Goutis:
Comparison of the Hardware Implementation of Stream Ciphers. Int. Arab J. Inf. Technol. 2(4): 267-274 (2005) - [j5]Grigoris Dimitroulakos, Michalis D. Galanis, Athanasios Milidonis, Constantinos E. Goutis:
A high-throughput, memory efficient architecture for computing the tile-based 2D discrete wavelet transform for the JPEG2000. Integr. 39(1): 1-11 (2005) - [j4]Paris Kitsos, Michalis D. Galanis, Odysseas G. Koufopavlou:
An Fpga Implementation of the Gprs Encryption Algorithm 3 (gea3). J. Circuits Syst. Comput. 14(2): 217-232 (2005) - [j3]Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Constantinos E. Goutis:
A Reconfigurable Coarse-grain Data-path for Accelerating Computational Intensive Kernels. J. Circuits Syst. Comput. 14(4): 877-893 (2005) - [c24]Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis:
Speedups from Partitioning Critical Software Parts to Coarse-Grain Reconfigurable Hardware. ASAP 2005: 50-59 - [c23]Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis:
Alleviating the Data Memory Bandwidth Bottleneck in Coarse-Grained Reconfigurable Arrays. ASAP 2005: 161-168 - [c22]Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis:
Accelerating Applications by Mapping Critical Kernels on Coarse-Grain Reconfigurable Hardware in Hybrid Systems. FCCM 2005: 301-302 - [c21]Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis:
Performance Improvements using Coarse-Grain Reconfigurable Logic in Embedded SoCs. FPL 2005: 630-635 - [c20]Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis:
Partitioning DSP applications to different granularity reconfigurable hardware. ICECS 2005: 1-4 - [c19]Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis:
A Compiler Method for Memory-Conscious Mapping of Applications on Coarse-Grained Reconfigurable Architectures. IPDPS 2005 - [c18]Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis:
A Framework for Partitioning Computational Intensive Applications in Hybrid Reconfigurable Platforms. IPDPS 2005 - [c17]Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis, Athanasios Milidonis:
A high-throughput and memory efficient 2D discrete wavelet transform hardware architecture for JPEG2000 standard. ISCAS (1) 2005: 472-475 - [c16]Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis:
A methodology for partitioning DSP applications in hybrid reconfigurable systems. ISCAS (2) 2005: 1206-1209 - [c15]Michalis D. Galanis, Gregory Dimitroulakos, Constantinos E. Goutis:
An automated methodology for memory-conscious mapping of DSP applications on coarse-grain reconfigurable arrays. ISCAS (4) 2005: 3519-3522 - [c14]Paris Kitsos, Michalis D. Galanis, Odysseas G. Koufopavlou:
A RAM-based FPGA implementation of the 64-bit MISTY1 block cipher. ISCAS (5) 2005: 4641-4644 - [c13]Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis:
Performance Gains from Partitioning Embedded Applications in Processor-FPGA SoCs. PATMOS 2005: 247-256 - 2004
- [j2]Paris Kitsos, Nicolas Sklavos, Michalis D. Galanis, Odysseas G. Koufopavlou:
64-bit Block ciphers: hardware implementations and comparison analysis. Comput. Electr. Eng. 30(8): 593-604 (2004) - [j1]Athanasios Milidonis, Gregory Dimitroulakos, Michalis D. Galanis, Athanasios P. Kakarountas, George Theodoridis, Constantinos E. Goutis, Francky Catthoor:
A Framework for Data Partitioning for C++ Data-Intensive Applications. Des. Autom. Embed. Syst. 9(2): 101-121 (2004) - [c12]Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis:
A Partitioning Methodology for Accelerating Applications in Hybrid Reconfigurable Platforms. DATE 2004: 247-252 - [c11]Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Constantinos E. Goutis:
Accelerating DSP Applications on a Mixed Granularity Platform with a New Reconfigurable Coarse-Grain Data-Path. FCCM 2004: 275-276 - [c10]Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Constantinos E. Goutis:
A novel coarse-grain reconfigurable data-path for accelerating DSP kernels. FPGA 2004: 252 - [c9]Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Constantinos E. Goutis:
Mapping DSP Applications to a High-Performance Reconfigurable Coarse-Grain Data-Path. FPL 2004: 868-873 - [c8]Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Costas E. Goutis:
A high performance data-path to accelerate DSP kernels. ICECS 2004: 495-498 - [c7]Michalis D. Galanis, Paris Kitsos, Giorgos Kostopoulos, Nicolas Sklavos, Odysseas G. Koufopavlou, Costas E. Goutis:
Comparison of the hardware architectures and FPGA implementations of stream ciphers. ICECS 2004: 571-574 - [c6]Paris Kitsos, Michalis D. Galanis, Odysseas G. Koufopavlou:
High-speed hardware implementations of the KASUMI block cipher. ISCAS (2) 2004: 549-552 - [c5]Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Constantinos E. Goutis:
Mapping Computational Intensive Applications to a New Coarse-Grained Reconfigurable Data-Path. PATMOS 2004: 652-661 - [c4]Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Costas E. Goutis:
A Novel Data-Path for Accelerating DSP Kernels. SAMOS 2004: 363-372 - [c3]Athanasios Milidonis, Grigoris Dimitroulakos, Michalis D. Galanis, George Theodoridis, Constantinos E. Goutis, Francky Catthoor:
An Automated C++ Code and Data Partitioning Framework for Data Management of Data-Intensive Applications. SCOPES 2004: 122-136 - 2003
- [c2]Gregory Dimitroulakos, Athanasios Milidonis, Michalis D. Galanis, George Theodoridis, Costas E. Goutis, Francky Catthoor:
Power aware data type refinement on the HIPERLAN/2. ICECS 2003: 216-219 - 2002
- [c1]Michalis D. Galanis, Arhanassios Papazacharias, Evangelos Zigouris:
A DSP course for real-time systems design and implementation based on the TMS320C6211 DSK. DSP 2002: 853-856
Coauthor Index
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