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L. Baba Arimilli
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2010 – 2019
- 2018
- [j4]L. Baba Arimilli, Bart Blaner, Ben C. Drerup, Charles F. Marino, Derek Williams, Eric N. Lais, Francesco A. Campisano, Guy L. Guthrie, Michael S. Floyd, Ross Leavens, Scot M. Willenborg, Ronald N. Kalla, Bülent Abali:
IBM POWER9 processor and system features for computing in the cognitive era. IBM J. Res. Dev. 62(4/5): 1:1-1:11 (2018) - [j3]Jeffrey Stuecheli, William J. Starke, John D. Irish, L. Baba Arimilli, Daniel M. Dreps, Bart Blaner, Curt Wollbrink, Brian Allison:
IBM POWER9 opens up a new era of acceleration enablement: OpenCAPI. IBM J. Res. Dev. 62(4/5): 8:1-8:8 (2018) - 2011
- [j2]Ramakrishnan Rajamony, L. Baba Arimilli, Kevin J. Gildea:
PERCS: The IBM POWER7-IH high-performance computing system. IBM J. Res. Dev. 55(3): 3 (2011) - [r1]E. N. Elnozahy, Evan Speight, Jian Li, Ramakrishnan Rajamony, Lixin Zhang, L. Baba Arimilli:
PERCS System Architecture. Encyclopedia of Parallel Computing 2011: 1506-1515 - 2010
- [c2]L. Baba Arimilli, Steve Baumgartner, Scott Clark, Daniel Dreps, David W. Siljenberg, Andrew Maki:
The IBM POWER7 HUB module: A terabyte interconnect switch for high-performance computer systems. Hot Chips Symposium 2010: 1-33 - [c1]L. Baba Arimilli, Ravi Arimilli, Vicente Chung, Scott Clark, Wolfgang E. Denzel, Ben C. Drerup, Torsten Hoefler, Jody B. Joyner, Jerry Lewis, Jian Li, Nan Ni, Ramakrishnan Rajamony:
The PERCS High-Performance Interconnect. Hot Interconnects 2010: 75-82
1990 – 1999
- 1994
- [j1]Jama Barreh, Robert T. Golla, L. Baba Arimilli, Paul J. Jordan:
POWER2 instruction cache unit. IBM J. Res. Dev. 38(5): 537-544 (1994)
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