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2020 – today
- 2024
[j52]Francesco Vigli, Marcello Barbirotta
, Abdallah Cheikh, Francesco Menichelli, Antonio Mastrandrea, Mauro Olivieri:
A RISC-V Fault-Tolerant Soft-Processor Based on Full/Partial Heterogeneous Dual-Core Protection. IEEE Access 12: 30495-30506 (2024)- [j51]Marcello Barbirotta, Francesco Menichelli, Abdallah Cheikh, Antonio Mastrandrea, Marco Angioli, Mauro Olivieri:
Dynamic Triple Modular Redundancy in Interleaved Hardware Threads: An Alternative Solution to Lockstep Multi-Cores for Fault-Tolerant Systems. IEEE Access 12: 95720-95735 (2024) - [j50]Marcello Barbirotta, Francesco Minervini, Carlos Rojas Morales, Adrián Cristal, Osman S. Unsal, Mauro Olivieri:
Enhancing Fault Tolerance in High-Performance Computing: A Real Hardware Case Study on a RISC-V Vector Processing Unit. IEEE Open J. Comput. Soc. 5: 553-565 (2024) - [j49]Marco Angioli, Marcello Barbirotta, Abdallah Cheikh, Antonio Mastrandrea, Francesco Menichelli, Saeid Jamili, Mauro Olivieri:
Design, Implementation and Evaluation of a New Variable Latency Integer Division Scheme. IEEE Trans. Computers 73(7): 1767-1779 (2024) - [c60]Marco Angioli, Saeid Jamili, Marcello Barbirotta, Abdallah Cheikh, Antonio Mastrandrea, Francesco Menichelli, Antonello Rosato, Mauro Olivieri:
AeneasHDC: An Automatic Framework for Deploying Hyperdimensional Computing Models on FPGAs. IJCNN 2024: 1-8 - [c59]Marco Angioli, Marcello Barbirotta, Abdallah Cheikh, Antonio Mastrandrea, Mauro Olivieri:
Exploring Variable Latency Dividers in Vector Hardware Accelerators. PRIME 2024: 1-4 - 2023
- [j48]Mate Kovac, Leon Dragic, Branimir Malnar, Francesco Minervini, Oscar Palomar, Carlos Rojas, Mauro Olivieri, Josip Knezovic, Mario Kovac:
FAUST: Design and implementation of a pipelined RISC-V vector floating-point unit. Microprocess. Microsystems 97: 104762 (2023) - [j47]Francesco Minervini, Oscar Palomar, Osman S. Unsal, Enrico Reggiani, Josue V. Quiroga, Joan Marimon, Carlos Rojas, Roger Figueras, Abraham Ruiz, Alberto González, Jonnatan Mendoza, Iván Vargas, César Hernández, Joan Cabre, Lina Khoirunisya, Mustapha Bouhali, Julian Pavon, Francesc Moll, Mauro Olivieri, Mario Kovac, Mate Kovac, Leon Dragic, Mateo Valero, Adrián Cristal:
Vitruvius+: An Area-Efficient RISC-V Decoupled Vector Coprocessor for High Performance Computing Applications. ACM Trans. Archit. Code Optim. 20(2): 28:1-28:25 (2023) - [c58]Francesco Bellotti, Elisa Bricco, Agostino G. Bruzzone, Daniele D. Caviglia, Ermanno Di Zitti, Paolo Gastaldo, Daniele Grosso, Lauro Magnani, Mauro Olivieri, Marco Raggio, Maurizio Valle, Alessandro Verri, Riccardo Berta:
Alessandro De Gloria, a Pioneer in Electronic Engineering Applications. ApplePies 2023: 3-11 - [c57]Marcello Barbirotta, Francesco Menichelli, Antonio Mastrandrea, Abdallah Cheikh, Marco Angioli, Saeid Jamili, Mauro Olivieri:
Heterogeneous Tightly-Coupled Dual Core Architecture Against Single Event Effects. ApplePies 2023: 15-21 - [c56]Saeid Jamili, Antonio Mastrandrea, Abdallah Cheikh, Marcello Barbirotta, Francesco Menichelli, Marco Angioli, Mauro Olivieri:
A Universal Hardware Emulator for Verification IPs on FPGA: A Novel and Low-Cost Approach. ApplePies 2023: 36-41 - [c55]Marcello Barbirotta, Marco Angioli, Antonio Mastrandrea, Abdallah Cheikh, Saeid Jamili, Francesco Menichelli, Mauro Olivieri:
Single Event Transient Reliability Analysis on a Fault-Tolerant RISC-V Microprocessor Design. ApplePies 2023: 42-48 - [c54]Enrico Reggiani, Alessandro Pappalardo, Max Doblas, Miquel Moretó, Mauro Olivieri, Osman Sabri Unsal, Adrián Cristal:
Mix-GEMM: An efficient HW-SW Architecture for Mixed-Precision Quantized Deep Neural Networks Inference on Edge Devices. HPCA 2023: 1085-1098 - [c53]Marco Angioli, Marcello Barbirotta, Antonio Mastrandrea, Saeid Jamili, Mauro Olivieri:
Automatic Hardware Accelerators Reconfiguration through LinearUCB Algorithms on a RISC-V Processor. PRIME 2023: 169-172 - 2022
- [j46]Marcello Barbirotta, Abdallah Cheikh, Antonio Mastrandrea, Francesco Menichelli, Mauro Olivieri:
Design and Evaluation of Buffered Triple Modular Redundancy in Interleaved-Multi-Threading Processors. IEEE Access 10: 126074-126088 (2022) - [c52]Marco Angioli, Marcello Barbirotta, Abdallah Cheikh, Antonio Mastrandrea, Francesco Menichelli, Saeid Jamili, Mauro Olivieri:
Contextual Bandits Algorithms for Reconfigurable Hardware Accelerators. ApplePies 2022: 149-154 - [c51]Saeid Jamili, Abdallah Cheikh, Antonio Mastrandrea, Marcello Barbirotta, Francesco Menichelli, Marco Angioli, Mauro Olivieri:
Implementation of Dynamic Acceleration Unit Exchange on a RISC-V Soft-Processor. ApplePies 2022: 300-306 - [c50]Enrico Reggiani, Cristóbal Ramírez Lazo, Roger Figueras Bagué, Adrián Cristal, Mauro Olivieri, Osman Sabri Unsal:
BiSon-e: a lightweight and high-performance accelerator for narrow integer linear algebra computing on the edge. ASPLOS 2022: 56-69 - [c49]Marcello Barbirotta, Abdallah Cheikh, Antonio Mastrandrea, Francesco Menichelli, Mauro Olivieri:
Analysis of a Fault Tolerant Edge-Computing Microarchitecture Exploiting Vector Acceleration. PRIME 2022: 237-240 - 2021
- [j45]Abdallah Cheikh, Stefano Sordillo, Antonio Mastrandrea, Francesco Menichelli, Giuseppe Scotti, Mauro Olivieri:
Klessydra-T: Designing Vector Coprocessors for Multithreaded Edge-Computing Cores. IEEE Micro 41(2): 64-71 (2021) - [c48]Marco Aldinucci, Giovanni Agosta, Antonio Andreini, Claudio Agostino Ardagna, Andrea Bartolini, Alessandro Cilardo, Biagio Cosenza, Marco Danelutto, Roberto Esposito, William Fornaciari, Roberto Giorgi, Davide Lengani, Raffaele Montella, Mauro Olivieri, Sergio Saponara, Daniele Simoni, Massimo Torquati:
The Italian research on HPC key technologies across EuroHPC. CF 2021: 178-184 - [c47]Marcello Barbirotta, Abdallah Cheikh, Antonio Mastrandrea, Francesco Menichelli, Francesco Vigli, Mauro Olivieri:
A Fault Tolerant soft-core obtained from an Interleaved-Multi- Threading RISC- V microprocessor design. DFT 2021: 1-4 - 2020
- [j44]Davide Bellizia, Simone Bongiovanni, Mauro Olivieri, Giuseppe Scotti:
SC-DDPL: A Novel Standard-Cell Based Approach for Counteracting Power Analysis Attacks in the Presence of Unbalanced Routing. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(7): 2317-2330 (2020) - [c46]Marcello Barbirotta, Antonio Mastrandrea, Francesco Menichelli, Francesco Vigli, Luigi Blasi, Abdallah Cheikh, Stefano Sordillo, Fabio Di Gennaro, Mauro Olivieri:
Fault resilience analysis of a RISC-V microprocessor design through a dedicated UVM environment. DFT 2020: 1-6 - [i3]Abdallah Cheikh, Stefano Sordillo, Antonio Mastrandrea, Francesco Menichelli, Giuseppe Scotti, Mauro Olivieri:
Klessydra-T: Designing Vector Coprocessors for Multi-Threaded Edge-Computing Cores. CoRR abs/2007.09109 (2020)
2010 – 2019
- 2019
- [j43]Fabrizio Gagliardi, Miquel Moretó, Mauro Olivieri, Mateo Valero:
The international race towards Exascale in Europe. CCF Trans. High Perform. Comput. 1(1): 3-13 (2019) - [j42]Giulia Stazi, Antonio Mastrandrea, Mauro Olivieri, Francesco Menichelli:
Full System Emulation of Approximate Memory Platforms with AppropinQuo. J. Low Power Electron. 15(1): 30-39 (2019) - [c45]Giulia Stazi, Antonio Mastrandrea, Mauro Olivieri, Francesco Menichelli:
Quality Aware Selective ECC for Approximate DRAM. ApplePies 2019: 109-116 - [c44]Luigi Blasi, Francesco Vigli, Abdallah Cheikh, Antonio Mastrandrea, Francesco Menichelli, Mauro Olivieri:
A RISC-V Fault-Tolerant Microcontroller Core Architecture Based on a Hardware Thread Full/Partial Protection and a Thread-Controlled Watch-Dog Timer. ApplePies 2019: 505-511 - [c43]Abdallah Cheikh, Stefano Sordillo, Antonio Mastrandrea, Francesco Menichelli, Mauro Olivieri:
Efficient Mathematical Accelerator Design Coupled with an Interleaved Multi-threading RISC-V Microprocessor. ApplePies 2019: 529-539 - [c42]Giulia Stazi, Antonio Mastrandrea, Mauro Olivieri, Francesco Menichelli:
Quality Aware Approximate Memory in RISC-V Linux Kernel. PRIME 2019: 177-180 - 2018
- [c41]Giulia Stazi, Federica Silvestri, Antonio Mastrandrea, Mauro Olivieri, Francesco Menichelli:
Synthesis Time Reconfigurable Floating Point Unit for Transprecision Computing. ApplePies 2018: 261-267 - [c40]Giulia Stazi, Antonio Mastrandrea, Mauro Olivieri, Francesco Menichelli:
Approximate Memory Support for Linux Early Allocators in ARM Architectures. ApplePies 2018: 429-435 - [c39]Mauro Olivieri, Usman Khalid, Antonio Mastrandrea, Francesco Menichelli:
Characterizing noise pulse effects on the power consumption of idle digital cells. ISCAS 2018: 1-5 - [c38]Giulia Stazi, Antonio Mastrandrea, Mauro Olivieri, Francesco Menichelli:
AppropinQuo: A Platform Emulator for Exploring the Approximate Memory Design Space. NGCAS 2018: 66-69 - [c37]Giulia Stazi, Lorenzo Adani, Antonio Mastrandrea, Mauro Olivieri, Francesco Menichelli:
Impact of Approximate Memory Data Allocation on a H.264 Software Video Encoder. ISC Workshops 2018: 545-553 - [c36]Zia Abbas, Andleeb Zahra, Mauro Olivieri:
LEADER: Leakage Currents Estimation Technique for Aging Degradation Aware 16 nm CMOS Circuits. VDAT 2018: 394-407 - 2017
- [c35]Abdallah Cheikh, Gianmarco Cerutti, Antonio Mastrandrea, Francesco Menichelli, Mauro Olivieri:
The Microarchitecture of a Multi-threaded RISC-V Compliant Processing Core Family for IoT End-Nodes. ApplePies 2017: 89-97 - [c34]Mauro Olivieri, Abdallah Cheikh, Gianmarco Cerutti, Antonio Mastrandrea, Francesco Menichelli:
Investigation on the Optimal Pipeline Organization in RISC-V Multi-threaded Soft Processor Cores. NGCAS 2017: 45-48 - [i2]Abdallah Cheikh, Gianmarco Cerutti, Antonio Mastrandrea, Francesco Menichelli, Mauro Olivieri:
The microarchitecture of a multi-threaded RISC-V compliant processing core family for IoT end-nodes. CoRR abs/1712.04902 (2017) - [i1]Usman Khalid, Antonio Mastrandrea, Mauro Olivieri:
Effect of NBTI/PBTI Aging and Process Variations on Write Failures in MOSFET and FinFET Flip-Flops. CoRR abs/1712.06934 (2017) - 2016
- [j41]Zia Abbas, Mauro Olivieri:
Optimal transistor sizing for maximum yield in variation-aware standard cell design. Int. J. Circuit Theory Appl. 44(7): 1400-1424 (2016) - [c33]Francesco Menichelli, Giulia Stazi, Antonio Mastrandrea, Mauro Olivieri:
An Emulator for Approximate Memory Platforms Based on QEmu. ApplePies 2016: 153-159 - 2015
- [j40]Usman Khalid, Antonio Mastrandrea, Mauro Olivieri:
Effect of NBTI/PBTI aging and process variations on write failures in MOSFET and FinFET flip-flops. Microelectron. Reliab. 55(12): 2614-2626 (2015) - [c32]Claudio Santo Malavenda, Francesco Menichelli, Mauro Olivieri:
Narrowband Delay Tolerant Protocols for WSN Applications: Characterization and Selection Guide. ApplePies 2015: 109-121 - [c31]Luca Benini, Renu Mehra, Mauro Olivieri:
Message from the general chairs. ISLPED 2015: 1-2 - 2014
- [j39]Claudio Santo Malavenda, Francesco Menichelli, Mauro Olivieri:
A Regulation-Based Security Evaluation Method for Data Link in Wireless Sensor Network. J. Comput. Networks Commun. 2014: 591920:1-591920:15 (2014) - [j38]Zia Abbas, Mauro Olivieri:
Impact of technology scaling on leakage power in nano-scale bulk CMOS digital standard cells. Microelectron. J. 45(2): 179-195 (2014) - [j37]Mauro Olivieri, Antonio Mastrandrea:
Logic Drivers: A Propagation Delay Modeling Paradigm for Statistical Simulation of Standard Cell Designs. IEEE Trans. Very Large Scale Integr. Syst. 22(6): 1429-1440 (2014) - [j36]Zia Abbas, Antonio Mastrandrea, Mauro Olivieri:
A Voltage-Based Leakage Current Calculation Scheme and its Application to Nanoscale MOSFET and FinFET Standard-Cell Designs. IEEE Trans. Very Large Scale Integr. Syst. 22(12): 2549-2560 (2014) - [c30]Francesco Menichelli, Mauro Olivieri:
A Platform-Based Emulator for Mass-Storage Flash Cards Evaluation in Embedded Systems. ApplePies 2014: 195-201 - [c29]Marco Marazza, Francesco Menichelli, Mauro Olivieri, Orlando Ferrante, Alberto Ferrari:
A Model-Based Methodology to Generate Code for Timer Units. ApplePies 2014: 203-210 - [c28]Usman Khalid, Antonio Mastrandrea, Mauro Olivieri:
Combined Impact of NBTI Aging and Process Variations on Noise Margins of Flip-Flops. DSD 2014: 488-495 - 2013
- [j35]Fabrizio Ramundo, Paolo Nenzi, Mauro Olivieri:
First integration of MOSFET band-to-band-tunneling current in BSIM4. Microelectron. J. 44(1): 26-32 (2013) - [j34]Zia Abbas, Mauro Olivieri, Marat Yakupov, Andreas Ripp:
Design centering/yield optimization of power aware band pass filter based on CMOS current controlled current conveyor (CCCII+). Microelectron. J. 44(4): 321-331 (2013) - [j33]Mauro Olivieri, Antonio Mastrandrea:
A General Design Methodology for Synchronous Early-Completion-Prediction Adders in Nano-CMOS DSP Architectures. VLSI Design 2013: 785281:1-785281:12 (2013) - [c27]Claudio Santo Malavenda, Francesco Menichelli, Mauro Olivieri:
Wireless and Ad Hoc Sensor Networks: An Industrial Example Using Delay Tolerant, Low Power Protocols for Security-Critical Applications. ApplePies 2013: 153-162 - [c26]Simone Bongiovanni, Mauro Olivieri, Giuseppe Scotti, Alessandro Trifiletti:
A flip-flop implementation for the DPA-resistant Delay-based Dual-rail Pre-charge Logic family. MIXDES 2013: 163-168 - 2012
- [j32]Claudio Santo Malavenda, Francesco Menichelli, Mauro Olivieri:
Delay-Tolerant, Low-Power Protocols for Large Security-Critical Wireless Sensor Networks. J. Comput. Networks Commun. 2012: 863521:1-863521:10 (2012) - [c25]Zia Abbas, Marat Yakupov, Mauro Olivieri, Andreas Ripp, Gunter Strube:
Yield optimization for low power current controlled current conveyor. SBCCI 2012: 1-6 - 2011
- [c24]Francesco Menichelli, Mauro Olivieri, Simone Smorfa:
Performance evaluation of Jpeg2000 implementation on VLIW cores, SIMD cores and multi-cores. ISCAS 2011: 1483-1486 - 2010
- [j31]Francesco Menichelli, Mauro Olivieri:
TikTak: A Scalable Simulator of Wireless Sensor Networks Including Hardware/Software Interaction. Wirel. Sens. Netw. 2(11): 815-822 (2010)
2000 – 2009
- 2009
- [j30]Francesco Menichelli, Mauro Olivieri:
Static Minimization of Total Energy Consumption in Memory Subsystem for Scratchpad-Based Systems-on-Chips. IEEE Trans. Very Large Scale Integr. Syst. 17(2): 161-171 (2009) - [c23]Francesco Paterna, Luca Benini, Andrea Acquaviva, Francesco Papariello, Giuseppe Desoli, Mauro Olivieri:
Adaptive idleness distribution for non-uniform aging tolerance in MultiProcessor Systems-on-Chip. DATE 2009: 906-909 - 2008
- [j29]Roberto Mancuso, Simone Smorfa, Mauro Olivieri:
A novel high-quality YUV-based image coding technique for efficient image storage in portable electronic appliances. IEEE Trans. Consumer Electron. 54(2): 695-702 (2008) - [j28]Francesco Menichelli, Renato Menicocci, Mauro Olivieri, Alessandro Trifiletti:
High-Level Side-Channel Attack Modeling and Simulation for Security-Critical Systems on Chips. IEEE Trans. Dependable Secur. Comput. 5(3): 164-176 (2008) - [c22]Luca Giancane, Piero Marietti, Mauro Olivieri, Giuseppe Scotti, Alessandro Trifiletti:
A new dynamic differential logic style as a countermeasure to power analysis attacks. ICECS 2008: 364-367 - [p1]Simone Smorfa, Mauro Olivieri, Roberto Mancuso:
LCD Design Techniques. Wiley Encyclopedia of Computer Science and Engineering 2008 - 2007
- [j27]Simone Smorfa, Mauro Olivieri:
HW-SW optimisation of JPEG2000 wavelet transform for dedicated multimedia processor architectures. IET Comput. Digit. Tech. 1(2): 137-143 (2007) - [j26]Marco Bucci, Raimondo Luzzi, Francesco Menichelli, Renato Menicocci, Mauro Olivieri, Alessandro Trifiletti:
Testing power-analysis attack susceptibility in register-transfer level designs. IET Inf. Secur. 1(3): 128-133 (2007) - [j25]Mauro Olivieri, Francesco Pappalardo, Simone Smorfa, Giuseppe Visalli:
Analysis and Implementation of a Novel Leading Zero Anticipation Algorithm for Floating-Point Arithmetic Units. IEEE Trans. Circuits Syst. II Express Briefs 54-II(8): 685-689 (2007) - [j24]Mauro Olivieri, Roberto Mancuso, Friedbert Riedel:
A Reconfigurable, Low Power, Temperature Compensated IC for 8-segment Gamma Correction Curve in TFT, OLED and PDP Displays. IEEE Trans. Consumer Electron. 53(2): 720-724 (2007) - [c21]Francesco Centurelli, Luca Giancane, Mauro Olivieri, Giuseppe Scotti, Alessandro Trifiletti:
A Statistical Model of Logic Gates for Monte Carlo Simulation Including On-Chip Variations. PATMOS 2007: 516-525 - 2006
- [j23]Simone Smorfa, Mauro Olivieri, Roberto Mancuso, Martin Lienhard:
A physical-level LCD driver model and simulator with application to pixel crosstalk suppression. IEEE Trans. Consumer Electron. 52(3): 1027-1034 (2006) - [c20]Manfred Josef Aigner, Stefan Mangard, Francesco Menichelli, Renato Menicocci, Mauro Olivieri, Thomas Popp, Giuseppe Scotti, Alessandro Trifiletti:
Side channel analysis resistant design flow. ISCAS 2006 - 2005
- [j22]Mauro Olivieri, Simone Smorfa, Alessandro Trifiletti:
Design and Test of a Novel Programmable Clock Generator Semi-Custom Core for Energy-Efficient Systems-on-Chips. J. Low Power Electron. 1(3): 309-318 (2005) - [j21]Mauro Olivieri, Giuseppe Scotti, Alessandro Trifiletti:
A novel yield optimization technique for digital CMOS circuits design by means of process parameters run-time estimation and body bias active control. IEEE Trans. Very Large Scale Integr. Syst. 13(5): 630-638 (2005) - [j20]Luca Benini, Davide Bertozzi, Alessandro Bogliolo, Francesco Menichelli, Mauro Olivieri:
MPARM: Exploring the Multi-Processor SoC Design Space with SystemC. J. VLSI Signal Process. 41(2): 169-182 (2005) - [c19]Mauro Olivieri, Francesco Pappalardo, Giuseppe Visalli:
statistical analysis, for reducing the energy dissipation in a bus-switch encoder. Circuits, Signals, and Systems 2005: 50-55 - [c18]Mauro Olivieri, Francesco Pappalardo, Giuseppe Visalli:
Design issues for bus switch systems in deep sub-micro metric CMOS technologies. Circuits, Signals, and Systems 2005: 112-117 - [c17]Francesco Menichelli, Mauro Olivieri, Simone Smorfa, Irene Zaccardini:
Software optimization of the JPEG2000 algorithm on a VLIW CPU core for system-on-chip implementation. Circuits, Signals, and Systems 2005: 222-227 - [c16]Manfred Josef Aigner, Stefan Mangard, Renato Menicocci, Mauro Olivieri, Giuseppe Scotti, Alessandro Trifiletti:
A novel CMOS logic style with data independent power consumption. ISCAS (2) 2005: 1066-1069 - [c15]Mauro Olivieri, Francesco Pappalardo, Giuseppe Visalli:
Encoding circuits for low power optical on-chip communications. ISCAS (5) 2005: 5206-5209 - [c14]Mauro Olivieri, Mirko Scarana, Simone Smorfa:
Circuit-level power efficiency investigation of advanced DSP architectures based on a specialized power modeling technique. ISCAS (5) 2005: 5266-5269 - 2004
- [j19]Luca Benini, Francesco Menichelli, Mauro Olivieri:
A Class of Code Compression Schemes for Reducing Power Consumption in Embedded Microprocessor Systems. IEEE Trans. Computers 53(4): 467-482 (2004) - [j18]Mauro Olivieri, Francesco Pappalardo, Giuseppe Visalli:
Bus-switch coding for reducing power dissipation in off-chip buses. IEEE Trans. Very Large Scale Integr. Syst. 12(12): 1374-1377 (2004) - [c13]Federico Angiolini, Francesco Menichelli, Alberto Ferrero, Luca Benini, Mauro Olivieri:
A post-compiler approach to scratchpad mapping of code. CASES 2004: 259-267 - [c12]Francesco Menichelli, Mauro Olivieri, Luca Benini, Monica Donno, Labros Bisdounis:
A Simulation-Based Power-Aware Architecture Exploration of a Multiprocessor System-on-Chip Design. DATE 2004: 312-317 - [c11]Francesco Centurelli, Stefano Costi, Mauro Olivieri, Salvatore Pennisi, Alessandro Trifiletti:
Robust three-state PFD architecture with enhanced frequency acquisition capabilities. ISCAS (4) 2004: 812-815 - [c10]Mauro Olivieri, Mirko Scarana, Giuseppe Scotti, Alessandro Trifiletti:
Yield Optimization by Means of Process Parameters Estimation: Comparison Between ABB and ASV Techniques. PATMOS 2004: 119-128 - 2003
- [c9]Mauro Olivieri, Marco Raspa:
Power Efficiency of Application-Dependent Self-Configuring Pipeline Depth in DSP Microprocessors. IPDPS 2003: 185 - 2002
- [j17]Mauro Olivieri:
Theoretical system-level limits of power dissipation reduction under a performance constraint in VLSI microprocessor design. IEEE Trans. Very Large Scale Integr. Syst. 10(5): 595-600 (2002) - 2001
- [j16]Mauro Olivieri:
Design of synchronous and asynchronous variable-latency pipelined multipliers. IEEE Trans. Very Large Scale Integr. Syst. 9(2): 365-376 (2001) - [j15]Mauro Olivieri:
Correction to "design of synchronous and asynchronous variable-latency pipelined multipliers". IEEE Trans. Very Large Scale Integr. Syst. 9(4): 558-559 (2001) - [c8]Mauro Olivieri:
A genetic approach to the design space exploration of superscalar microprocessor architectures. ISCAS (5) 2001: 69-72 - [c7]Mauro Olivieri, Alessandro Trifiletti:
An all-digital clock generator firm-core based on differential fine-tuned delay for reusable microprocessor cores. ISCAS (4) 2001: 638-641 - [c6]Alessandro De Gloria, Mauro Olivieri:
An application specific multi-port RAM cell circuit for register renaming units in high speed microprocessors. ISCAS (4) 2001: 934-937 - 2000
- [j14]Mauro Bertacchi, Alessandro De Gloria, Daniele Grosso, Mauro Olivieri:
Semicustom Design of an IEEE 1394-Compliant Reusable IC Core. IEEE Des. Test Comput. 17(3): 95-105 (2000)
1990 – 1999
- 1999
- [c5]Alessandro De Gloria, Paolo Palma, Mauro Olivieri:
Delay-Insensitive Synthesis of the MCS 251 Microcontroller Core for Low Power Applications. EUROMICRO 1999: 1244-1247 - [c4]Mauro Olivieri, Alessandro Trifiletti, Alessandro De Gloria:
A Low-Power Microcontroller with on-Chip Self-Tuning Digital Clock-Generator for Variable-Load Applications. ICCD 1999: 476-481 - 1997
- [j13]Alessandra Costa, Alessandro De Gloria, Fabrizio Giudici, Mauro Olivieri:
Fuzzy logic microcontroller. IEEE Micro 17(1): 66-74 (1997) - 1996
- [j12]Alessandro De Gloria, Mauro Olivieri:
Statistical Carry Lookahead Adders. IEEE Trans. Computers 45(3): 340-347 (1996) - [j11]Alessandra Costa, Alessandro De Gloria, Mauro Olivieri:
Hardware design of asynchronous fuzzy controllers. IEEE Trans. Fuzzy Syst. 4(3): 328-338 (1996) - [j10]Alessandro De Gloria, Mauro Olivieri:
An asynchronous distributed architecture model for the Boltzmann machine control mechanism. IEEE Trans. Neural Networks 7(6): 1538-1541 (1996) - 1995
- [j9]Alessandro De Gloria, Mauro Olivieri:
Efficient semicustom micropipeline design. IEEE Trans. Very Large Scale Integr. Syst. 3(3): 464-469 (1995) - 1994
- [j8]Alessandro De Gloria, Paolo Faraboschi, Mauro Olivieri:
Block placement with a Boltzmann Machine. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13(6): 694-701 (1994) - [c3]Alessandra Costa, Alessandro De Gloria, Paolo Faraboschi, Mauro Olivieri:
An evaluation system for distributed-time VHDL simulation. PADS 1994: 147-150 - 1993
- [j7]Alessandro De Gloria, Paolo Faraboschi, Mauro Olivieri:
Delay insensitive micro-pipelined combinational logic. Microprocess. Microprogramming 36(5): 225-241 (1993) - [j6]Alessandro De Gloria, Paolo Faraboschi, Mauro Olivieri:
A delay insensitive approach to the VLSI design of a DRAM controller. Microprocess. Microprogramming 37(1-5): 19-22 (1993) - [j5]Alessandro De Gloria, Paolo Faraboschi, Mauro Olivieri:
Design of a massively parallel SIMD architecture for the Boltzmann machine. Microprocess. Microprogramming 37(1-5): 153-156 (1993) - [j4]Alessandra Costa, Alessandro De Gloria, Paolo Faraboschi, Giovanni Nateri, Mauro Olivieri:
An asynchronous approach to the RISC design of a micro-controller. Microprocess. Microprogramming 38(1-5): 447-454 (1993) - [j3]Alessandra Costa, Alessandro De Gloria, Paolo Faraboschi, Mauro Olivieri:
A parallel architecture for the Color Doppler flow technique in ultrasound imaging. Microprocess. Microprogramming 38(1-5): 545-551 (1993) - [j2]Alessandro De Gloria, Paolo Faraboschi, Mauro Olivieri:
Clustered Boltzmann Machines: Massively Parallel Architectures for Constrained Optimization Problems. Parallel Comput. 19(2): 163-175 (1993) - [j1]Alessandro De Gloria, Paolo Faraboschi, Mauro Olivieri:
Efficient implementation of the Boltzmann machine algorithm. IEEE Trans. Neural Networks 4(1): 159-163 (1993) - [c2]Alessandra Costa, Alessandro De Gloria, Paolo Faraboschi, Mauro Olivieri:
An analysis of dynamic scheduling techniques for symbolic applications. MICRO 1993: 185-191 - 1992
- [c1]Alessandro De Gloria, Paolo Faraboschi, Mauro Olivieri:
A non-deterministic scheduler for a software pipelining compiler. MICRO 1992: 41-44
Coauthor Index
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Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
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OpenAlex data
Load additional information about publications from 
.
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last updated on 2024-10-23 21:25 CEST by the dblp team
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