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Pietro Babighian
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2010 – 2019
- 2017
- [c7]Chuanhe Jay Shan, Pietro Babighian, Yan Pan, John M. Carulli, Li-C. Wang:
Systematic defect detection methodology for volume diagnosis: A data mining perspective. ITC 2017: 1-10
2000 – 2009
- 2007
- [c6]Pietro Babighian, Gila Kamhi, Moshe Y. Vardi:
Interactive presentation: PowerQuest: trace driven data mining for power optimization. DATE 2007: 1078-1083 - 2006
- [b1]Pietro Babighian:
Methodologies and techniques for power optimization of digital circuits. Polytechnic University of Turin, Italy, 2006 - [c5]Pietro Babighian, Luca Benini, Alberto Macii, Enrico Macii:
Enabling fine-grain leakage management by voltage anchor insertion. DATE 2006: 868-873 - 2005
- [j1]Pietro Babighian, Luca Benini, Enrico Macii:
A scalable algorithm for RTL insertion of gated clocks based on ODCs computation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(1): 29-42 (2005) - [c4]Pietro Babighian, Luca Benini, Alberto Macii, Enrico Macii:
Low-overhead state-retaining elements for low-leakage MTCMOS design. ACM Great Lakes Symposium on VLSI 2005: 367-370 - 2004
- [c3]Pietro Babighian, Luca Benini, Enrico Macii:
A Scalable ODC-Based Algorithm for RTL Insertion of Gated Clocks. DATE 2004: 500-505 - [c2]Pietro Babighian, Luca Benini, Enrico Macii:
Sizing and Characterization of Leakage-Control Cells for Layout-Aware Distributed Power-Gating. DATE 2004: 720-723 - [c1]Pietro Babighian, Luca Benini, Alberto Macii, Enrico Macii:
Post-layout leakage power minimization based on distributed sleep transistor insertion. ISLPED 2004: 138-143
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