"Soft error immune latch design for 20 nm bulk CMOS."

Taiki Uemura et al. (2015)

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DOI: 10.1109/IRPS.2015.7112825

access: closed

type: Conference or Workshop Paper

metadata version: 2022-01-03

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Taiki Uemura, Takashi Kato, Hideya Matsuyama, Masanori Hashimoto:
Soft error immune latch design for 20 nm bulk CMOS. IRPS 2015: 4

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