7 nm process: Difference between revisions
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In February 2017, [[Intel]] announced Fab 42 in Arizona will produce microprocessors using 7 nm manufacturing process.<ref>[https://newsroom.intel.com/news-releases/intel-supports-american-innovation-7-billion-investment-next-generation-semiconductor-factory-arizona/ Intel Supports American Innovation with $7 Billion Investment in Next-Generation Semiconductor Factory in Arizona: Intel’s Fab 42 will Target Advanced 7 nm Technology and Create More Than 10,000 Jobs in Arizona]</ref> |
In February 2017, [[Intel]] announced Fab 42 in Arizona will produce microprocessors using 7 nm manufacturing process.<ref>[https://newsroom.intel.com/news-releases/intel-supports-american-innovation-7-billion-investment-next-generation-semiconductor-factory-arizona/ Intel Supports American Innovation with $7 Billion Investment in Next-Generation Semiconductor Factory in Arizona: Intel’s Fab 42 will Target Advanced 7 nm Technology and Create More Than 10,000 Jobs in Arizona]</ref> |
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== Process nodes== |
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Transistor gate pitch is also referred to as contacted poly pitch (CPP) and interconnect pitch is also referred to as minimum metal pitch (MMP).<ref>{{Cite web|url=http://hothardware.com/news/intel-details-advanced-10nm-node|title=Intel Details Cannonlake's Advanced 10nm FinFET Node, Claims Full Generation Lead Over Rivals}}</ref><ref name=itrs2>{{Cite web|url=https://www.semiconductors.org/clientuploads/Research_Technology/ITRS/2015/0_2015%20ITRS%202.0%20Executive%20Report%20(1).pdf|title=International Technology Roadmap for Semiconductors 2.0 2015 Edition Executive Report}}</ref><ref name=semi2>{{Cite web|url=https://www.semiwiki.com/forum/content/6713-14nm-16nm-10nm-7nm-what-we-know-now.html|title=14nm 16nm 10nm and 7nm - What we know now}}</ref> The ITRS roadmap initially suggested a 7nm node with a poly pitch of 42nm with a metal pitch of 24 nm<ref name=itrs2 />. Samsung proposed a 7nm process with a poly pitch of 44 nm with a metal pitch of 36 nm. Likewise, TSMC 7 nm is proposed at 54 nm by 40 nm respectively<ref name=semi2 />. |
Transistor gate pitch is also referred to as contacted poly pitch (CPP) and interconnect pitch is also referred to as minimum metal pitch (MMP).<ref>{{Cite web|url=http://hothardware.com/news/intel-details-advanced-10nm-node|title=Intel Details Cannonlake's Advanced 10nm FinFET Node, Claims Full Generation Lead Over Rivals}}</ref><ref name=itrs2>{{Cite web|url=https://www.semiconductors.org/clientuploads/Research_Technology/ITRS/2015/0_2015%20ITRS%202.0%20Executive%20Report%20(1).pdf|title=International Technology Roadmap for Semiconductors 2.0 2015 Edition Executive Report}}</ref><ref name=semi2>{{Cite web|url=https://www.semiwiki.com/forum/content/6713-14nm-16nm-10nm-7nm-what-we-know-now.html|title=14nm 16nm 10nm and 7nm - What we know now}}</ref> The ITRS roadmap initially suggested a 7nm node with a poly pitch of 42nm with a metal pitch of 24 nm<ref name=itrs2 />. Samsung proposed a 7nm process with a poly pitch of 44 nm with a metal pitch of 36 nm. Likewise, TSMC 7 nm is proposed at 54 nm by 40 nm respectively<ref name=semi2 />. |
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Revision as of 23:55, 13 May 2017
| Semiconductor device fabrication |
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MOSFET scaling (process nodes) |
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Future
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In semiconductor manufacturing, the International Technology Roadmap for Semiconductors defines the 7 nanometer (7 nm) node as the technology node following the 10 nm node.
Single transistor 7 nm scale devices were first produced in the early 2000s – as of 2017 commercial production of 7 nm chips is at a development stage.
History
Technology demos
In July 2015, IBM announced that they had built the first functional transistors with 7 nm technology, using a silicon-germanium process.[1][2]
Expected commercialisation and technologies
Although Intel has not yet divulged any certain plans to manufacturers or retailers, it has already stated that it would no longer use silicon at this node.[3] A possible replacement material for silicon would be indium gallium arsenide (InGaAs) or graphene.[4]
In April 2016, TSMC announced that 7 nm trial production would begin in the first half of 2017.[5] In March 2017, TSMC announced 7 nm risk production starting by June 2018.[6]
In September 2016, GlobalFoundries announced trial production in the second half of 2017 and risk production in early 2018, with test chips already running.[7]
In February 2017, Intel announced Fab 42 in Arizona will produce microprocessors using 7 nm manufacturing process.[8]
Process nodes
Transistor gate pitch is also referred to as contacted poly pitch (CPP) and interconnect pitch is also referred to as minimum metal pitch (MMP).[9][10][11] The ITRS roadmap initially suggested a 7nm node with a poly pitch of 42nm with a metal pitch of 24 nm[10]. Samsung proposed a 7nm process with a poly pitch of 44 nm with a metal pitch of 36 nm. Likewise, TSMC 7 nm is proposed at 54 nm by 40 nm respectively[11].
References
- ^ IBM Research builds functional 7nm processor
- ^ IBM Discloses Working Version of a Much Higher-Capacity Chip - NYTimes.com
- ^ "ISSCC 2015: Intel 10 nm Last Silicon Node". Android Authority.
- ^ Sebastian Anthony (February 23, 2015). "Intel forges ahead to 10nm, will move away from silicon at 7nm: To keep up with Moore's law, Intel is looking at new materials, 3D packaging". arstechnica.com.
{{cite news}}: Cite has empty unknown parameter:|1=(help) - ^ WATCH OUT INTEL AND SAMSUNG: TSMC IS GEARING UP FOR 7NM PROCESSING WITH TRIAL PRODUCTION
- ^ "TSMC Tips 7+, 12, 22nm Nodes | EE Times". EETimes. Retrieved 2017-03-17.
- ^ "GLOBALFOUNDRIES to Deliver Industry's Leading-Performance Offering of 7nm FinFET Technology" (Press release). September 15, 2016. Retrieved April 8, 2017.
- ^ Intel Supports American Innovation with $7 Billion Investment in Next-Generation Semiconductor Factory in Arizona: Intel’s Fab 42 will Target Advanced 7 nm Technology and Create More Than 10,000 Jobs in Arizona
- ^ "Intel Details Cannonlake's Advanced 10nm FinFET Node, Claims Full Generation Lead Over Rivals".
- ^ a b "International Technology Roadmap for Semiconductors 2.0 2015 Edition Executive Report" (PDF).
- ^ a b "14nm 16nm 10nm and 7nm - What we know now".
| Preceded by 10 nm |
CMOS manufacturing processes | Succeeded by 5 nm |
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