Mach-RT: A Many Chip Architecture for Ray Tracing

Vasiou, Elena; Shkurko, Konstantin; Brunvand, Erik; Yuksel, Cem

Mach-RT: A Many Chip Architecture for Ray Tracing

Files

001-006.pdf (5.52 MB)

Date

2019

Authors

Vasiou, Elena
Shkurko, Konstantin
Brunvand, Erik
Yuksel, Cem

Publisher

The Eurographics Association

Abstract

We propose an unconventional solution to high-performance ray tracing that combines a ray ordering scheme that minimizes access to the scene data with a large on-chip buffer acting as near-compute storage that is spread over multiple chips. We demonstrate the effectiveness of our approach by introducing Mach-RT (Many chip - Ray Tracing), a new hardware architecture for accelerating ray tracing. Extending the concept of dual streaming, we optimize the main memory accesses to a level that allows the same memory system to service multiple processor chips at the same time. While a multiple chip solution might seem to imply increased energy consumption as well, because of the reduced memory traffic we are able to demonstrate, performance increases while maintaining reasonable energy usage compared to academic and commercial architectures.

        @inproceedings{10.2312:hpg.20191188
,
booktitle = {High-Performance Graphics - Short Papers
},
editor = {Steinberger, Markus and Foley, Tim
},
title = {{Mach-RT: A Many Chip Architecture for Ray Tracing
}},
author = {Vasiou, Elena and 
Shkurko, Konstantin and 
Brunvand, Erik and 
Yuksel, Cem
},
year = {2019
},
publisher = {The Eurographics Association
},
ISSN = {2079-8687
},
ISBN = {978-3-03868-092-5
},
DOI = {10.2312/hpg.20191188
}
}