Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_1a34d7d2e0d09a58cb7bf4a04c81162e |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01S5-423 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2831 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01S5-0021 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2874 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01S5-005 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-275 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2863 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2884 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L22-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2872 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01S5-42 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01S5-183 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-27 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01S5-042 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-66 |
filingDate |
2002-08-12^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3959ca978ff991b0b13953f7393dc32f http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_00727c84cc8a8f04ab923613b20620e6 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_fea8a2cfca4ca020b9a3dc7d139e6136 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b60bce196ef5db426a5046268a6d5430 |
publicationDate |
2003-02-27^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
CA-2457675-A1 |
titleOfInvention |
Providing current control over wafer borne semiconductor devices using trenches |
abstract |
Disclosed are methods for providing wafer parasitic current control to a semiconductor wafer (1500) having a substrate (1520), at least one active layer (1565) and a surface layer (1510), and electrical contacts (1515) form ed on said surface layer (1510). Current control can be achieved with the formation of trenches (1525) around electrical contacts, where electrical contacts and associated layers define an electronic device. Insulating implants (1530) can be placed into trenches (1525) and/or sacrificial layers (1540) can be formed between electronic contacts (1515). Trenches control current by promoting current flow within active (e.g., conductive) regions (1560) and impeding current flow through inactive (e.g., nonconductive) regions (1550). Methods of and systems for wafer level burn-in (WLBI) of semiconductor devices are also disclosed. Current control at the wafer level is important when using WLBI methods and systems. |
priorityDate |
2001-08-13^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |