http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CA-2457675-A1

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filingDate 2002-08-12^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3959ca978ff991b0b13953f7393dc32f
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publicationDate 2003-02-27^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber CA-2457675-A1
titleOfInvention Providing current control over wafer borne semiconductor devices using trenches
abstract Disclosed are methods for providing wafer parasitic current control to a semiconductor wafer (1500) having a substrate (1520), at least one active layer (1565) and a surface layer (1510), and electrical contacts (1515) form ed on said surface layer (1510). Current control can be achieved with the formation of trenches (1525) around electrical contacts, where electrical contacts and associated layers define an electronic device. Insulating implants (1530) can be placed into trenches (1525) and/or sacrificial layers (1540) can be formed between electronic contacts (1515). Trenches control current by promoting current flow within active (e.g., conductive) regions (1560) and impeding current flow through inactive (e.g., nonconductive) regions (1550). Methods of and systems for wafer level burn-in (WLBI) of semiconductor devices are also disclosed. Current control at the wafer level is important when using WLBI methods and systems.
priorityDate 2001-08-13^^<http://www.w3.org/2001/XMLSchema#date>
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