http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-105099828-B
Outgoing Links
| Predicate | Object |
|---|---|
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H04L43-08 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H04L43-50 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H04L43-18 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H04L12-26 |
| filingDate | 2015-08-25^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate | 2018-09-25^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 2018-09-25^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CN-105099828-B |
| titleOfInvention | A kind of implementation method of high performance network tester |
| abstract | The invention discloses a kind of high performance network tester and its implementation, using the framework of FPGA+PowerPC+ARM.Network tester is made of RJ45 interfaces, transformer, physical interface PHY, optical interface SFP, FPGA, PowerPC, ARM and display control unit.FPGA completes the generation and reception of test flow, and the work such as parsing, control and statistics that data are carried out with first and second layer of message, PowerPC realizes that the communication with computer is realized in the parsing of third layer and the above procotol, ARM, to realize display and control to whole equipment.The advantages that present invention takes into account the advantages of 3 kinds of processors, has flexibility height, at low cost, support multiple interfaces and strong autgmentability. |
| priorityDate | 2015-08-25^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Showing number of triples: 1 to 16 of 16.