http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-109273450-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_f80f7502fa29eccce5d0ca3b654f4d96 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-20 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-40 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-41 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-20 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-11529 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-11573 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-11578 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-11551 |
| filingDate | 2018-09-04^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d798f0aadd7daf19f7be928539932f7e http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7ee32f926474e95a607b9118110f4f4e |
| publicationDate | 2019-01-25^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CN-109273450-A |
| titleOfInvention | Three-dimensional memory manufacturing method |
| abstract | The present invention relates to the field of semiconductor manufacturing technology, and in particular, to a method of manufacturing a three-dimensional memory. The method for fabricating a three-dimensional memory includes the steps of: providing a substrate; forming a conductive connection pad over the substrate; forming a bit line over the conductive connection pad, the end of the bit line being perpendicular to The direction of the substrate is electrically connected to the conductive connection pad; an upper layer wire is formed over the bit line, and an end of the upper layer wire is electrically connected to the conductive connection pad in a direction perpendicular to the substrate . The invention avoids the problem that the upper layer conductor is easily misaligned when the upper layer conductor is connected with the bit line due to the narrow line width of the bit line, avoids the mutual influence between the adjacent bit lines, and improves the performance of the three-dimensional memory. |
| priorityDate | 2018-09-04^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
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