| abstract |
Provided are a semiconductor memory device, a memory system, and a method of operating the semiconductor memory device. A semiconductor memory device includes a memory cell array, an error correction code (ECC) engine, a refresh control circuit, a scrub control circuit, and a control logic circuit. The refresh control circuit generates a refresh row address for refreshing a memory area on a memory cell row in response to a first command received from a memory controller. The scrub control circuit counts the refresh row addresses, and generates a scrub address for performing a scrub operation on a first memory cell row in the memory cell rows whenever the scrub control circuit counts N refresh row addresses in the refresh row addresses . The ECC engine reads the first data corresponding to the first codeword from at least one subpage in the first memory cell row, corrects at least one error bit in the first codeword, and writes the corrected first codeword back to the corresponding storage location. |