http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-112632806-B

Outgoing Links

Predicate Object
classificationCPCAdditional http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y02D10-00
classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F30-34
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F30-22
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F30-22
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F30-34
filingDate 2020-12-18^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2022-07-05^^<http://www.w3.org/2001/XMLSchema#date>
publicationDate 2022-07-05^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber CN-112632806-B
titleOfInvention A Verilog HDL Code Generation Method for Petri Nets
abstract The invention discloses a Petri net Verilog HDL code generation method, belonging to the field of computer technology. The purpose of the invention is to provide a tool that can use Verilog HDL to describe the Petri net and automatically generate codes, by reading the output matrix of the Petri net , input matrix, delay matrix, and then the user manually enters the maximum capacity of each Petri net library to automatically generate the hardware Petri net model. The model takes place and transition as the basic module of the architecture, uses combinational logic and memory to implement P/T system to realize transition operation in Petri net system; uses random strategy to control resource conflict and other situations; design delay module for different The parameters of the time delay system are realized; the controller module is designed to control the running state of the Petri net; the memory module is designed to facilitate the Petri net to load and collect data.
priorityDate 2020-09-12^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

Incoming Links

Predicate Subject
isDiscussedBy http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID6547
http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID414859283

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