http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-113347556-A

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filingDate 2021-02-18^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0b4272de7124b60cae79b3d95277bbb4
publicationDate 2021-09-03^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber CN-113347556-A
titleOfInvention Clock Error Estimation for Dual Clock Electronics
abstract Clock error estimates for dual clock electronics are disclosed. An implementation method for finding an estimate of the clock error of a slave clock, wherein the slave clock is set to a nominal slave period and outputs a sequence of slave clock signals with an actual slave period, and wherein the actual slave period and the nominal slave period The difference between the slave periods is approximated by an estimate of the clock error.
priorityDate 2020-02-17^^<http://www.w3.org/2001/XMLSchema#date>
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