http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-114709171-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_f80f7502fa29eccce5d0ca3b654f4d96 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-20 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5386 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-20 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-35 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76897 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-35 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-11524 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-1157 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-11551 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-538 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-11578 |
| filingDate | 2022-03-31^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e7ef663a86f6ae7eaf54110f875da6c2 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_31bcec4607a92f56e621cc03a8a1ef8d http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_01078b9f8960f96f24cc1fb56fd15f09 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_3fafb29a1ae6794fdc4ad45a66e7ab57 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_85187fc850b1dfd217c7484c8895951f |
| publicationDate | 2022-07-05^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CN-114709171-A |
| titleOfInvention | Manufacturing method of semiconductor device, semiconductor device and storage system |
| abstract | The present application provides a method for fabricating a semiconductor device, a semiconductor device, and a storage system. The method includes: providing a substrate, where the substrate includes a substrate, a stack structure, an opening, a first insulating layer, a first filling layer, and a second filling layer, The stacked structure includes a plurality of stacked first steps, the first steps include an insulating dielectric layer and a sacrificial layer arranged in sequence, in the opening, the first sub-opening penetrates the sacrificial layer to the insulating dielectric layer, and the second sub-opening communicates with the first sub-opening and penetrate into the substrate, a first insulating layer and a first filling layer are arranged in the second sub-openings in sequence, and the first sub-opening is filled with a second filling layer; each sacrificial layer and each second filling layer are respectively replaced to include The material of the first metal layer; the substrate and part of the first insulating layer are removed, so that each first filling layer is exposed; and each first filling layer is respectively replaced with a second metal layer. The present application ensures that the overall structure of the semiconductor device has a good supporting effect during the manufacturing process. |
| priorityDate | 2022-03-31^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
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