http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-205068409-U

Outgoing Links

Predicate Object
assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_f1c18575f03da24d1514d713764de828
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F21-76
filingDate 2015-10-30^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2016-03-02^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_efe6ad9646aad77103343ecd05985242
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_79031c4fe65897d3aaa6a8f6e301e26b
publicationDate 2016-03-02^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber CN-205068409-U
titleOfInvention Protection circuit of FPGA configuration port
abstract The utility model provides a protection circuit of FPGA configuration port, include: a configurator, the configurator is connected with a FPGA chip through at least one buffer. Set up at least one buffer between configurator and FPGA, makeed the configuration port of FPGA chip is avoided exposing in the air, has avoided the static electricity discharge problem. Simultaneously, also make avoid lug connection between configurator and the FPGA chip, also avoided the heavy current right the phenomenon of overshooting that the configuration port of FPGA chip caused.
priorityDate 2015-10-30^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Predicate Subject
isDiscussedBy http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID456468049

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