http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-206907766-U

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classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-49
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filingDate 2017-07-12^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2018-01-19^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_904b97c02625a41173a21473e611ceec
publicationDate 2018-01-19^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber CN-206907766-U
titleOfInvention A high-efficiency dual-chip triode
abstract The utility model relates to the technical field of semiconductor electronic components, in particular to a high-efficiency double-chip triode. When the triode is packaged, it is generally necessary to use bonding wires to conduct welding and conduction of the chip and the lead soldering station. When using single-wire welding, The bonding wire used is relatively thick, and it takes a long time to solder, and the temperature of the solder point is also high, which will generate a large amount of heat, which will cause damage to the chip and increase the defect rate. A single bonding wire is also easy to cause work. Low efficiency, providing a high-efficiency dual-chip triode, by welding more bonding copper wires between the guide pins and the chip, the multi-wire welding is more secure, and can effectively reduce the welding temperature and reduce damage to the chip , setting the number of welding bonding wires on the input pins is more than that on the output pins, the energy required for the next level is small, and the load capacity is improved.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-114885495-A
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priorityDate 2017-07-12^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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