Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_d2051317369a779747701bc0ebe411a4 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-6678 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78657 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42384 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76888 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-423 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-12 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-52 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3205 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 |
filingDate |
1978-10-17^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1fdb63e44442d8127a5be0f5d8daca3a http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0cd5211fbbbf083b4d70f5a7548ce1b4 |
publicationDate |
1979-05-30^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
EP-0002107-A2 |
titleOfInvention |
Method of making a planar semiconductor device |
abstract |
A semiconductor device (10) includes a region (32) of polycrystalline silicon on a portion of the surface (13) of a body (12) of semiconductor material. A layer (26) of oxidized polycrystalline silicon is also on the semiconductor material body and extends to the polycrystalline silicon region. The surface of the silicon oxide layer is substantially coplanar with the surface of the polycrystalline silicon region so that a metal film conductor (28) can be easily provided over the semiconductor device. The polycrystalline silicon region may be the gate of an MOS transistor or a conductive region of any type of semiconductor device. The semiconductor device is made by forming a polycrystalline silicon layer over the semiconductor material body, forming a mask on a portion of the polycrystalline silicon layer, reducing the thickness of the unmasked portion of the polycrystalline silicon layer and then oxidizing the unmasked portion of the polycrystalline silicon layer to form the oxide layer. n In MOS transistors, both the contacts and gate of the device can be formed from one polycrystalline silicon layer by appropriate masking, thinning, and oxidizing steps. |
isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0412701-A3 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-5245452-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-5410172-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-4849805-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0412701-A2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/GB-2138632-A |
priorityDate |
1977-11-17^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |