http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0151633-A4
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_3a62c92e56568bd104089aac22ca487b |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K2005-00176 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y10S331-03 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K2005-00097 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03L7-07 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K3-70 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K9-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K3-0315 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03L7-0995 |
| classificationIPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K5-00 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K3-03 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03B5-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03L7-07 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R29-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03M5-12 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-086 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K3-70 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03L7-08 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03L7-099 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K9-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H04L25-49 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K3-282 |
| filingDate | 1984-08-03^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_bac1cd3f4f88810b7718ba1e3779552c |
| publicationDate | 1987-04-28^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | EP-0151633-A4 |
| titleOfInvention | INTERRUPTABLE VOLTAGE CONTROLLED OSCILLATOR. |
| abstract | As shown in (Fig. 2A), the fall time of an ECL gate (20) is precisely controlled using a fixed capacitor (46) which is connected between the positive supply voltage and the ECL gate output terminal (44), and a variable current source (48, 50, 52) connected between ground (GRND 3) and the ECL gate output terminal (44). A time-delay circuit is obtained by controlling the variable current source with an error voltage (VR2) of a phase-locked loop such that the time-delay precisely tracks the frequency of the reference signal for the phase-locked loop. A signal detector circuit is obtained by combining time-delay circuits. A voltage-controlled oscillator is assembled by connecting 3 ECL gates (12, 14, 16), as shown Fig. 1, with controlled fall times in a ring oscillator configuration. Addition of a noninverting input (19) to one ECL gate (16) makes the voltage-controlled oscillator interruptible. Combining a voltage-controlled oscillator of the type described with a phase detector fed by a reference signal provides a phase-locked loop with the control voltage thereof providing a frequency-to-voltage conversion function. A system for providing a receiver clock reference signal from a received signal is provided, as shown in Figs. 5A and 5B, by phase-locking the output signal of a first phase-locked loop (130) to a system reference signal (TCK) to generate a first-loop control voltage (X4). A second phase-locked loop is phase-locked to the received signal (MNCK) with a second-loop control voltage (VR4). In addition, the second phase-locked loop (142) is also frequency-locked to the system reference signal (TCK) by the first-loop control voltage (X4). This system is particularly useful for recovering a receiver clock reference from a Manchester-encoded signal. |
| priorityDate | 1983-08-05^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
| Predicate | Subject |
|---|---|
| isDiscussedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID415830539 http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID135446 |
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