http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0904604-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_508e7d633e9f849b09bd13b1e3b5f89c |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y10S148-126 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0696 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1095 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7811 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7813 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-404 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-26 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-40 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-26 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-06 |
| filingDate | 1997-05-07^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_bbd44bb0a659678e30e4a22912335c4e http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0d2514979b736bc8905212314b6959e0 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7e99c4e070947f6988e7624ab1023439 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_38b6e4d743b5bd5a56b2ed7d29ea7326 |
| publicationDate | 1999-03-31^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | EP-0904604-A1 |
| titleOfInvention | Fabrication of high-density trench dmos using sidewall spacers |
| abstract | A method for forming a trenched DMOS transistor with deep-body regions (138b) that occupy minimal area on an epitaxial layer (104) formed on a semiconductor substrate (100). A first oxide layer (110) is formed over the epitaxial layer (104) and patterned to define deep-body areas (102b) beneath which the deep-body regions (138b) are to be formed. Next, diffusion-inhibiting regions (105) of the first conductivity type are formed in each of the deep-body areas (102b) before forming a second oxide layer (112) covering the deep-body areas (102b) and the remaining portion of the first oxide layer (110). Portions of the second oxide layer (112) are then removed to expose the centers of diffusion inhibiting regions (105), leaving the first oxide layer (110) and oxide sidewall spacers (103) from the second oxide layer to cover the peripheries of the diffusion-inhibiting regions (105). A deep-body diffusion of a second conductivity type is then performed, resulting in the formation of deep-body regions (138b) in the epitaxial layer (104) between the sidewall spacers (103). The peripheries of the diffusion-inhibiting regions (105) covered by the remaining portions of the first and second oxide layers (110/112) inhibit lateral diffusion of the deep-body diffusions (138b) without significantly inhibiting diffusion depth. |
| priorityDate | 1996-05-08^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
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