| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_99505f5f312672820e9f78c254c00a4d |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-41775 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76888
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66825
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B41-30
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-40114
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66545
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76897
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B69-00 |
| classificationIPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-417 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8247
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8239
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-60
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-115 |
| filingDate |
2001-06-08^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2006-08-09^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_21f22749f3940b7e07717961c87f8886 |
| publicationDate |
2006-08-09^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
EP-1292974-B1 |
| titleOfInvention |
Method for making an electronic component with self-aligned drain and gate, in damascene architecture |
| abstract |
The invention concerns a method for making an electronic component with self-aligned source, drain and gate, comprising the following steps: a) forming on a silicon substrate (100) a dummy gate; b) forming a source (118) and a drain (120) on either side of the dummy gate; c) self-aligned surface siliconizing of the source and drain; d) depositing at least a metal coating (130, 132), called contact coating; e) replacing the dummy gate with at least a final gate (150). |
| priorityDate |
2000-06-09^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |