| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_fd446fb0d73aa96d044fea2eaa3c8ebc |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F11-165 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F11-1641
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F11-16
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F11-1407
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F11-14 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F11-14
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F11-16 |
| filingDate |
2006-10-18^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8511042c7b7a8e2eab151a41f3ab287f
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_25716e4b87ee89af55ee049ca83f8e63
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_750933c223871b8668e9965f124a1828
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e30735bf30e4ac13240d41abcb76c972
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_77327979a456d130a2af390fe6f95217 |
| publicationDate |
2008-08-06^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
EP-1952239-A1 |
| titleOfInvention |
Apparatus and method for eliminating errors in a system having at least two execution units with registers |
| abstract |
An apparatus (120) for eliminating errors in a system (100, 400) having at least two execution units (101, 102) with registers is presented, wherein the registers are designed to hold data. The apparatus has comparison means (126) which are set up in such a manner that a discrepancy and thus an error can be determined by comparing data which are intended to be stored in the registers. At least one shadow register (121, 122), which is set up in such a manner that it can store data relating to data from the registers, and means for restoring error-free data in at least one register on the basis of the data in the at least one shadow register (121, 122) in the event of an error being determined are furthermore provided. This apparatus can be used to improve the reliability of a multi-core processor (100). |
| priorityDate |
2005-11-18^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |