| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_48f279441984fea1b0d68bb222d677df |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05B2203-017
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05B2203-013
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-8238 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05B3-143
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05B3-0047
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01N27-14
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01N33-0016
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05B3-265
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05B3-148
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01N33-0027
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01N27-04
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01N27-128
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05B3-26
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01N27-18
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-8238
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02697 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05B3-26
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01N27-14 |
| filingDate |
2015-02-27^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f711c90600337933aff5e2ba822d6c64
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7563cd633fc6caec2730980033b062b8
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_084478fa6b9e66f60312f3e69fd73b4c |
| publicationDate |
2017-01-11^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
EP-3114467-A1 |
| titleOfInvention |
Cmos-based semiconductor device on micro-hotplate and method of fabrication |
| abstract |
It is disclosed herein a semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device is made using partly CMOS or CMOS based processing steps, and it includes a semiconductor substrate,a dielectric region over the semiconductor substrate, a heater within the dielectric region and a patterned layer of noble metal above the dielectric region. The method includes the deposition of a photoresist material over the dielectric region, and patterning the photo-resist material to form a patterned region over the dielectric region. The steps of depositing the photo-resist material and patterning the photo-resist material may be performed in sequence using similar photolithography and etching steps to those used in a CMOS process. The resulting semiconductor device is then subjected to further processing steps which ensure that a dielectric membrane and a metal structure within the membrane are formed in the patterned region over the dielectric region. |
| priorityDate |
2014-03-05^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |