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filingDate 1999-06-30^^<http://www.w3.org/2001/XMLSchema#date>
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publicationDate 2000-02-08^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-2000040075-A
titleOfInvention Determinism in multiprocessor computer systems and monitors and processors therefor
abstract (57) [Problem] To provide a deterministic multiprocessor computer system in which a plurality of processors operate asynchronously. A multiprocessor computer system includes a number of processing sets (12, 14), at least one of which is operable asynchronously with a second processing set. The monitor 18 is connected to receive I / O operations output from the processing sets, and identifies defective operations of these processing sets. The monitor also synchronizes the operation of the processing sets by notifying the processing sets when receiving an output from the processing sets indicating that the processing sets are in the same processing stage. Operable. The monitor buffers the I / O operations output from the processing set and selectively sends these I / O operations to an external I / O bus. The processing set can be formed by a single processor or multiple processors.
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